Technical Articles From Samsung Electro-Mechanics
Read technical articles about electronics manufacturing added by Samsung Electro-Mechanics
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2 technical articles added by Samsung Electro-Mechanics
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Package-on-Package (PoP) for Advanced PCB Manufacturing Process
Dec 16, 2021 | Joseph Y. Lee, Jinyong Ahn, JeGwang Yoo, and Shuichi Okabe
In the 1990's, both BGA (Ball Grid Array) and CSP (Chip Size Package) are entering their end in the front-end packaging materials and process technology. Both BGA and CSP like SMD (Surface Mount Device) from the I 980's and THD (Through-Hole mount Device) from the 1970's are reaching its own impasse in terms of maximizing its electrical, mechanical, and thermal performances, size, weight, and reliability....
Influence of Pd Thickness on Micro Void Formation of Solder Joints in ENEPIG Surface Finish
Dec 13, 2012 | Dong-Won Shin, Jin-Woo Heo, Yeonseop Yu, Jong-Soo Yoo, Pyoung-Woo Cheon, Seon-Hee Lee
First published in the 2012 IPC APEX EXPO technical conference proceedings. We investigated the micro-void formation of solder joints after reliability tests such as preconditioning (precon) and thermal cycle (TC) by varying the thickness of Palladium (Pd) in Electroless Nickel / Electroless Palladium / Immersion Gold (ENEPIG) surface finish. We used lead-free solder of Sn-1.2Ag-0.5Cu-Ni (LF35). We found multiple micro-voids of less than 10 µm line up within or above the intermetallic compound (IMC) layer. The number of micro-voids increased with the palladium (Pd) layer thickness. Our results revealed that the micro-void formation should be related to (Pd, Ni)Sn4 phase resulted from thick Pd layer. We propose that micro-voids may form due to either entrapping of volatile gas by (Pd, Ni)Sn4 or creeping of (Pd, Ni)Sn4....
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