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News from Association Connecting Electronics Industries (IPC)

Guidelines for Design and Assembly Process Implementation for Bottom Termination Components Released by IPC

May 03, 2011

Assemblers who have tried to resolve problems that stem from the rapidly growing array of advanced packages are getting some help from IPC with the newly released IPC-7093, Design and Assembly Process Implementation for Bottom Termination Components. This standard describes the critical design, assembly, inspection, repair, and reliability issues associated with bottom termination components (BTCs) whose external connections consist of metallized terminals that are an integral part of the component body.

Over the past few years, this class of components, which includes QFN, DFN, SON, LGA, MLP and MLF, has seen dramatic growth. QFNs, LGAs, passives and even power components have shifted their contacts to the bottom of the package, providing significant cost savings for semiconductor suppliers; and with shorter signal traces, improved speed. Together, these factors prompted many users to migrate to bottom-termination packages.

"It's amazing how broad the usage is. It ranges from inexpensive consumer products to high-reliability, military-grade systems," says Vern Solberg, co-chairman of the IPC 5-21h Bottom Termination Components (BTC) Task Group that developed IPC-7093.

IPC-7093 provides direction for a package style that has proven difficult to manage even though its usage is now widespread. "Strict process control is key when using these packages," explains Dieter Bergman, IPC staff liaison to the IPC 5-21h task group and director of technology transfer. "The package base and board have to be very flat, and the amount of solder volume that’s applied has to be properly related to the size of the terminations being attached to the surface."

Attempts by chipmakers to reduce the number of problems haven't been particularly effective. IPC-7093 provides guidelines for those striving to achieve perfection while dealing with real-world issues. The standard details techniques for component placement and solder application as well as processing issues. Reflow solder printing and reflow profile recommendations are also provided. The document also includes a number of photos and illustrations that will help users understand the root causes of problems.

Managers, design and process engineers, operators and technicians who deal with electronic design, assembly, inspection and repair processes will find the information contained in IPC-7093 useful and practical, especially if they are using or considering tin-lead, lead free, adhesives or other forms of interconnection processes for assembly of BTC-type components. Although not a complete recipe, the document identifies many of the characteristics that influence the successful implementation of robust and reliable assembly processes and provides guidance information to component suppliers regarding the issues being faced in the assembly process.

IPC members may request a free single-user download of IPC-7093 by sending an e-mail to within 90 days of the document’s publication date. After that date, IPC members may purchase the standard for $52. The nonmember price is $103. For more information or to purchase IPC-7093, visit

IPC ( is a global trade association based in Bannockburn, Ill., dedicated to the competitive excellence and financial success of its 2,900 member companies which represent all facets of the electronics industry, including design, printed board manufacturing, electronics assembly and test. As a member-driven organization and leading source for industry standards, training, market research and public policy advocacy, IPC supports programs to meet the needs of an estimated $1.85 trillion global electronics industry. IPC maintains additional offices in Taos, N.M.; Arlington, Va.; Garden Grove, Calif.; Stockholm, Sweden; Moscow, Russia; Bangalore, India; and Shanghai, Shenzhen and Beijing, China.

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