SMT, PCB Electronics Industry News
  • SMTnet
  • »
  • Industry News
  • »
  • Mentor Graphics New Tessent IJTAG Product Automates IP Test and Debug Integration in Large SoC Designs

Mentor Graphics New Tessent IJTAG Product Automates IP Test and Debug Integration in Large SoC Designs

Nov 06, 2012

Mentor Graphics Corporation (NASDAQ: MENT) today announced its new Tessent® IJTAG solution, which allows designers to easily reuse test, monitoring and debugging logic embedded in existing IP blocks. Supporting the IEEE P1687 (IJTAG) standard, the solution automatically retargets test and debug commands and generates an integrated hierarchical control and data network with a single top-level interface for an entire SoC. The solution, which supports any embedded instrumentation compliant to the P1687 standard, can be used where pin count is limited or access is difficult, as in stacked die configurations.

The continued exponential growth in semiconductor device functionality and performance relies not only on continued transistor scaling as defined by Moore’s Law, but also on increased use of a rapidly expanding and functionally diverse set of reusable IP blocks,” said Steve Pateras, product marketing director at Mentor Graphics. “This trend is driving the need for test and instrument integration standards and more efficient automation solutions to maintain design schedules and costs. We are seeing increasing customer interest in adopting an IEEE P1687-based integration flow to address test and debug of the growing amount of IP in their designs.

The IEEE P1687 standard will play a critical role in helping debug and test teams successfully manage the growing amount of IP used in today’s complex designs,” said Jeff Rearick, senior fellow at AMD and editor of the IEEE P1687 working group. “Successful deployment of the standard will be greatly expedited by comprehensive automation support. I’m excited to see Mentor deliver this key functionality in its Tessent product line.

The new IEEE P1687 standard creates an environment for plug-and-play integration of IP instrumentation, including control of boundary scan, built-in self-test (BIST), internal scan chains, and debug and monitoring features in IP blocks. The standard defines hardware rules related to instrumentation interfaces and connectivity between these interfaces, a language to describe these interfaces and connectivity, and a language to define operations to be applied to individual IP blocks. IJTAG replaces proprietary and incompatible IP interfaces from multiple suppliers with a standardized interface mechanism that enables plug-and-play integration of IP test and instrumentation facilities.

The Tessent IJTAG solution provides automated support for the IJTAG standard, substantially reducing the time and effort required to assemble large SoC designs from reusable IP blocks. The new product includes all the facilities needed to efficiently integrate IEEE P1687-compliant IP into a design:

  • Automatic verification that a given IP block is compliant to the P1687 standard
  • Verification that P1687-compliant IP blocks are properly connected within a P1687-compliant access network
  • Automatic creation of a P1687-compliant access network connecting IP to the top level instrument interface
  • Retargeting and merging of local IP instrumentation patterns through the P1687 network, allowing IP specific sequences to be applied from chip pins or from anywhere higher up in the system hierarchy

“Standards like P1687 are important enablers for maximizing our design productivity,” said Tom Waayers, DFT product manager and architect at NXP Semiconductors. “After an extensive evaluation, we have determined that the new Tessent IJTAG product will enable faster integration, as well as greater scalability, as our design complexities continue to grow.”

Availability

The Tessent IJTAG product is available now in Tessent release version 2012.3.


Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in the last fiscal year of about $1,015 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

Apr 13, 2017 -

Mentor Announces 27th Annual PCB Technology Leadership Awards Program

Jan 11, 2017 -

TSMC Collaborates With Mentor Graphics, Enabling Design and Verification Tools for New InFO Technology Variants

Sep 26, 2016 -

Mentor Graphics SystemVision Improves Siemens Building Technologies’ PCB Design Flow Worldwide

May 05, 2016 -

Mentor Graphics Announces PADS PCB Product Creation Platform with Voltage Drop and Electronic Cooling Capabilities

Mar 16, 2016 -

Mentor Graphics Announces a Secure Plug-and-Play IoT Device and Data Acquisition Solution for Electronics Manufacturing

Oct 18, 2015 -

Mentor Automotive announces Safety Certifiable Digital Instrument Cluster Solution

Mar 23, 2015 -

Mentor Graphics Launches Xpedition Package Integrator Flow for IC-Package-Board Design

Jan 27, 2015 -

HyperLynx Alliance Accelerates High-Speed Design-Ins and Verification

Dec 10, 2014 -

Mentor Graphics Announces 25th Annual PCB Technology Leadership Awards Winners

Oct 28, 2014 -

Mentor Graphics Announces Xpedition System Designer for Comprehensive Multi-board Systems Developmen

51 more news from Mentor Graphics »

May 23, 2024 -

A shield of Conformal Coating, the unsung hero that could have thwarted rust's encroaching fate.

May 21, 2024 -

GPD Global Precision Fluid Dispensing Systems Successful IPC APEX 2024

May 21, 2024 -

Unlock the Potential of Precision: Discover Our Expert PCBA Manufacturing!

May 20, 2024 -

Indium Corporation Experts to Present on Power Electronics at PCIM Europe

May 20, 2024 -

Indium Corporation Experts to Present at Electronics in Harsh Environments SMTA Conference.

May 20, 2024 -

Indium Corporation Expert to Present on Alternative Solder Alloys to Solve Emerging Challenges at SMTA Rocky Mountain Expo & Tech Forum

May 20, 2024 -

Saki Set to Highlight Cutting-Edge Inspection Technology at SMTConnect 2024

May 20, 2024 -

TRI opens New Manufacturing Facility

May 20, 2024 -

Indium Corporation Experts to Present on High-Temperature, Lead-Free Solder Paste and High Reliability Liquid Metal Alloys Poster at ECTC

May 20, 2024 -

Altus Adds PVA's Game Changing PathMaster X Software to Portfolio

See electronics manufacturing industry news »

Mentor Graphics New Tessent IJTAG Product Automates IP Test and Debug Integration in Large SoC Designs news release has been viewed 698 times

  • SMTnet
  • »
  • Industry News
  • »
  • Mentor Graphics New Tessent IJTAG Product Automates IP Test and Debug Integration in Large SoC Designs
SMT feeders

Void Free Reflow Soldering