Reliability Testing For Microvias In Printed Wire Boards
Published: |
January 21, 2021 |
Author: |
Bill Birch |
Abstract: |
Traditional single level microvia structures are generally considered the most robust type of interconnection within a printed wire board (PWB) substrate. The rapid implementation of HDI technology now commonly requires between 2, 3 or 4 levels of microvias sequentially processed into the product. Recent OEM funded reliability testing has confirmed that by increasing the levels (stack height) these structures are proving less reliable, when compared to their single or double level counterparts. Recently false positive results have been recorded on products tested with traditional thermal shock testing methodology (cycling between -40°C and 125°C, or 145°C). A number of companies are incurring product failures resulting in increased costs associated with replacing the circuit boards, components and added labour.... |
You must be a registered user to talk back to us. |
Company Information:
More articles from PWB Interconnect Solutions Inc. »
- Jul 27, 2021 - Dielectric Material Damage Vs. Conductive Anodic Filament Formation
- Apr 26, 2012 - Design and Construction Affects on PWB Reliability
- See all SMT / PCB technical articles from PWB Interconnect Solutions Inc. »
More SMT / PCB assembly technical articles »
- Mar 19, 2024 - What is Underfill | GPD Global
- Mar 19, 2024 - Made in Japan: Solder Paste Jet Dispensing Machine | I.C.T ( Dongguan ICT Technology Co., Ltd. )
- Feb 26, 2024 - Precision Control in Electronic Assembly: Selective Wave Soldering Machine | I.C.T ( Dongguan ICT Technology Co., Ltd. )
- Feb 02, 2024 - Maximizing Efficiency: The High-Speed SMT Line With Laser Depanelizer | I.C.T ( Dongguan ICT Technology Co., Ltd. )
- Dec 27, 2023 - Revolutionizing Tech: SMT Auto IC Programming Machine Mastery | I.C.T ( Dongguan ICT Technology Co., Ltd. )
- Browse Technical Library »
Reliability Testing For Microvias In Printed Wire Boards article has been viewed 758 times