Jan 12, 2016 | Dr. Mary Liu and Dr. Wusheng Yin
More and more Land Grid Array (LGA) components are being used in electronic devices such as smartphones, tablets and computers. In order to enhance LGA mechanical strength and reliability, capillary flow underfill is used to improve reliability. However, due to the small gap, it is difficult for capillary underfill to flow into the LGA at SMT level. Due to cost considerations, there are usually no pre-heating underfill or cleaning flux residue processes at the SMT assembly line. YINCAE solder joint encapsulant SMT256 has been successfully used with solder paste for LGA assembly. Solder joint encapsulant is used in in-line LGA soldering process with enhanced reliability. It eliminates the underfilling process and provides excellent reworkability. The shear st rength of solder joint is stronger than that of underfilled components. The thermal cycling performance using solder joint encapsulant is much better than that using underfill. Bottom IC of POP has been studied for further understanding of LGA assembly process parameters. All details such as assembly process, drop test and thermal cycling test will be discussed in this paper....
Publisher: YINCAE Advanced Materials, LLC.
Jan 08, 2016 | Dr. Mary Liu and Dr. Wusheng Yin
Solder joint encapsulant adhesives have been successfully used to enhance the strength of solder joints and improve thermal cycling as well as drop performance in finished products. The use of solder joint encapsulant adhesives can eliminate the need for underfill materials and the underfill process altogether, thus simplifying rework, which results in a lower cost of ownership.
Solder joint encapsulant adhesives include: low temperature and high temperature solder joint encapsulant adhesives, and their derivatives. Each solder joint encapsulant adhesive has: unfilled and filled solder joint encapsulant adhesives, and solder joint encapsulant paste. Each solder joint encapsulant product has been designed for different applications. In this paper, we are going to discuss the details and future of solder joint encapsulant adhesives. ...
Publisher: YINCAE Advanced Materials, LLC.
Jan 07, 2016 | Akira Takeuchi, Takahiro Kurahashi, Kyosuke Takeda
The purpose of this study is to investigate the effect of plasma surface modification to improve adhesion strength between polytetrafluoroethylene (PTFE) and electroless copper plating. PTFE is widely used in many industries because of its unique electrical, thermal, and mechanical characteristics. However, because of its low surface energy, it is difficult to acquire enough adhesion strength between PTFE and other substances without surface modification. Plasma is well known as one of the surface modification techniques that improve adhesion strength....
Publisher: Nissin Corporation
Dec 31, 2015 | Yong Hill Liang, Hank Mao, YongGang Yan, Jindong (King) Lee; AEG, Flextronics International.
Today's consumer electronic product are characterized by miniatuization, portability and light weight with high performance, especially for 3G mobile products. In the future more fine pitch CSPs (0.4mm) component will be required. However, the product reliability has been a big challenge with the fine pitch CSP. Firstly, the fine pitch CSPs are with smaller solder balls of 0.25mm diameter or even smaller. The small solder ball and pad size do weaken the solder connection and the adhesion of the pad and substrate, thus the pad will peel off easily from the PCB substrate. In addition, miniature solder joint reduce the strength during mechanical vibration, thermal shock, fatigue failure, etc. Secondly, applying sufficient solder paste evenly on the small pad of the CSP is difficult because stencil opening is only 0.25mm or less. This issue can be solved using the high end type of stencil such as Electroforming which will increase the cost....
Publisher: Flex (Flextronics International)
Dec 23, 2015 | Edward Arthur, Charles Busa, Melissa Durfee, Chad Gibson, Wade Goldman P.E.; Raytheon Company, Space and Airborne Systems, The Charles Stark Draper Laboratory, Inc., Raytheon Company, Integrated Defense Systems.
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.
The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias....
Dec 17, 2015 | Adrian Cheong
Product quality can be improved through proper application of design for test (DFT) strategies. With today's shrinking product sizes and increasing functionality, it is difficult to get good test coverage of loaded printed circuit boards due to the loss of test access. Advances in test techniques, such as boundary scan, help to recover this loss of test coverage. However, many of these test techniques need to be designed into the product to be effective.
This paper will discuss how to maximize the benefits of boundary scan test, including specific examples of how designers should select the right component, connect multiple boundary scan components in chains, add test access to the boundary scan TAP ports, etc. A discussion of DFT guidelines for PCB layout designers is also included. Finally, this paper will include a description of some advanced test methods used in in-circuit tests, such as vectorless test and special probing methods, which are implemented to improve test coverage on printed circuit boards with limited test access....
Publisher: Agilent Technologies, Inc.
Dec 14, 2015 | Pete Doyon, VP Product Management, Schleuniger, Inc.
A Manufacturing Execution System (MES) is a software program that manages and monitors production work in a factory. The MES controls and monitors all manufacturing data in real time, so there is no guesswork as to the status of any given job, machine, operator, etc. The focus is on short-interval scheduling (shift or day) with an emphasis on optimizing the distribution of work orders. Larger manufacturers have employed MES’s for years but many small to medium sized enterprises (SME’s) have yet to adopt such systems. The benefits of using an MES are many. Looking forward, I predict that even the smallest manufacturing companies will employ MES systems in the future....
Publisher: Schleuniger, Inc.
Dec 02, 2015 | Myung-June Lee -Altera Corporation, SungSoon Park, DongSu Ryu, MinJae Lee - Amkor Technology, Hank Saiki, Seiji Mori, Makoto Nagai - NTK Technologies.
(Thermal Compression with Non-Conductive Paste Underfill) Method.
The companies writing this paper have jointly developed Copper (Cu) Pillar micro-bump and TCNCP(Thermal Compression with Non-Conductive Paste) technology over the last two+ years. The Cu Pillar micro-bump and TCNCP is one of the platform technologies, which is essentially required for 2.5D/3D chip stacking as well as cost effective SFF (small form factor) package enablement.
Although the baseline packaging process methodology for a normal pad pitch (i.e. inline 50μm) within smaller chip size (i.e. 100 mm2) has been established and are in use for HVM production, there are several challenges to be addressed for further development for commercialization of finer bump pitch with larger die (i.e. ≤50μm tri-tier bond pad with the die larger than 400mm2).
This paper will address the key challenges of each field, such as the Cu trace design on a substrate for robust micro-joint reliability, TCNCP technology, and substrate technology (i.e. structure, surface finish). Technical recommendations based on the lessons learned from a series of process experimentation will be provided, as well. Finally, this technology has been used for the successful launching of the company FPGA products with SFF packaging technology....
Publisher: Altera Corporation
Dec 01, 2015 | Ed Kanegsberg
On January 1, 2015, nine months from APEX 2014, the production and use restrictions on HCFC-225 will be in effect throughout the United States. This phase out is encompassing in scope. This phase out will have significant technical, performance, and economic implications for the electronics industry. The regulatory situation remains fluid. A number of alternative solvents have been or are in the process of being developed. We discuss the options for assemblers and component manufacturers....
Publisher: BFK Solutions LLC
Nov 25, 2015 | Georgie Thein, David Geiger, and Murad Kurwa.
In this study various printed circuit board surface finishes were evaluated, including: organic solderability preservative (OSP), plasma finish (PF), immersion silver (IAg), electroless nickel / immersion silver (ENIS), electroless nickel / immersion gold hi-phosphorus (ENIG Hi-P), and electroless nickel / electroless palladium / immersion gold (ENEPIG). To verify the performance of PF as a post-treatment option, it was added to IAg, ENIG Hi-P, and ENEPIG to compare with non-treated. A total of nine groups of PCB were evaluated. Each group contains 30 boards, with the exception on ENIS where only 8 boards were available....
Publisher: Flex (Flextronics International)