Electronics Manufacturing Technical Articles

A New Stenciling Method for Reworking SMT Components

Jul 15, 2010 | Bob Wettermann

When reworking more complex SMT components such as finer pitch SMT components, SMTconnectors and even area array devices, the most common method of printing on the printing selectively on the PCB has some serious shortcomings. The most significant problem...

Publisher: BEST Inc.

Effect of Soldering Parameters on Reaction Kinetics and Phase Transformations of SAC 305 Solder

Jul 08, 2010 | T. Ryno, A. Kelley, J. Metzger, and D. Medlin; Department of Materials and Metallurgical Engineering, South Dakota School of Mines and Technology | C. Voyles, S. Richards; Radiance Technologies

As technology becomes increasingly reliant on electronics, understanding the reliability of lead-free solder also becomes increasingly important. This research project focused on phase transformation kinetics with the lead-free solder SAC 305. Today in the electronics industry, SAC 305 is the most widely used solder, making it a high priority to understand its long-term stability and performance in a variety of service conditions. Recent evidence has shifted the focus from thermal aging to reflow temperature and time above liquidus values during initial solder melting....

Publisher: Radiance Technologies

Effects of Thermal Aging on Copper Dissolution For SAC 405 Alloy

Jul 08, 2010 | Dr. Dana Medlin, Clay Voyles, Teneil Ryno, Casey Bergstrom, John Metzger, and Spencer Richards

Aging characteristics of new lead free solder alloys are in question by many experts because of higher amount of tin’s effect on the diffusion of other metals, primarily copper, to create undesirable boundary intermetallics over long periods of time and even moderately elevated temperatures. A primary layer of intermetallics, Cu6Sn5 forms as the liquid solder makes contact with the solid copper substrate. This reaction however ceases as the solder temperature falls below that of liquidus. A secondary intermetallic Cu3Sn1, an undesirable weak and brittle layer, is thought to form over time and may be accelerated by even mildly elevated temperatures in electronic modules such as laptops under power.

This project was designed to quantify the growth rate of Cu3Sn1 over an extended period of time in a thermal environment similar to a laptop in the power on mode....

Publisher: Radiance Technologies

Power Supply Control from PCB to Chip Core

Jun 30, 2010 | Nur Devnani, Eileen Murray

As silicon technology advances to enable higher density ASICs, the core logic voltage decreases. The lower voltage, in combination with higher current requirements, requires tighter tolerances on the power supplies. The control of the power supplies from the PCB to the die is the subject of this study. A frequency sweep simulation using typical bypass values shows that a discrete package capacitor is not a significant factor in reducing the chip core power supply fluctuation. A small voltage boost at the PCB supply can provide a more economical solution to managing the device supplies....

Publisher: Avago Technologies

Conductive Adhesives Increase Microchip Packaging Density

Jun 24, 2010 | Jakob Gakkestad, Per Dalsjo, Helge Kristiansen, Rolf Johannessen, and Maaike M.V. Taklo

Cost-effective assembly of custom-designed microelectromechanical systems (MEMS) for medium-caliber fuzes is challenging. In particular, the environment must have a setback acceleration exceeding 60,000g and centripetal acceleration of 9000g/mm out of center in a 30mm173 projectile. In addition, the space available is very limited. The traditional approach is to mount the MEMS chip in a package that is then soldered to the printed circuit board (PCB). However, by mounting the MEMS chip directly to the PCB using conductive adhesive, we can increase the packaging density while reducing manufacturing cost....

Publisher: SPIE - International Society for Optical Engineering

Next-Generation Test Equipment For High-Volume Wafer Production

Jun 23, 2010 | Kay Gastinger, Odd Løvhaugen

Quality control is one of the main bottlenecks in the production of micro-opto-electromechanical systems/microelectromechanical systems (MOEMS/MEMS) because each structure on a wafer is serially inspected and scanned stepwise over the entire wafer area. ...

Publisher: SPIE - International Society for Optical Engineering

Effect Of Squeegee Blade On Solder Paste Print Quality

Jun 17, 2010 | Rita Mohanty, Bill Claiborne; Speedline Technologies | Frank Andres; Cookson Electronics

The solder paste deposition process is viewed by many in the industry as the leading contributor of defects in the Surface Mount Technology (SMT) assembly process. As with all manufacturing processes, solder paste printing is subject to both special and common cause variation. Just like using graduated cylinders from distinctly different manufacturing processes to measure a volume of liquid, using different blades types can contribute significant special cause variation to a process. Understanding the significant differences in print performance between blade types is an important first step to establishing a standard blade for an SMT process....

Publisher: Speedline Technologies, Inc.

Validity of the IPC R.O.S.E. Method 2.3.25 Researched

Jun 10, 2010 | Mike Bixenman, Steve Stach

This paper researches the effectiveness of the R.O.S.E. cleanliness testing process for dissolving and measuring ionic contaminants from boards soldered with no-clean and lead-free flux technologies....

Publisher: KYZEN Corporation

Strategies for Designing Microwave Multilayer Printed Circuit Boards Using Stripline Structures

Jun 03, 2010 | Thomas McCarthy, Sean Reynolds, Jon Skelly

Strategies for successful design and manufacture of microwave multilayer printed circuit boards. All aspects from pad registration, dimensional stability, impedance fluctuation, fusion bonding, thermal ageing, z-axis expansion, reliability, to Young's mod...

Publisher: Taconic

The Reliability Challenges of QFN Packaging

May 27, 2010 | Randy Kong, Cheryl Tulkoff, Craig Hillman (presented at: SMTA China East Conference 2010)

The quad flat pack no lead or quad flat non-leaded (QFN) is one of the fastest growing package types in the electronics industry today. While the advantages of QFNs are well documented, concerns arise with its reliability and manufacturability. Acceptance of this package, especially in long-life, severe-environment, high-reliability applications, is currently limited. One of the most common drivers for reliability failures is inappropriate adoption of new technologies, such as the case with QFN. In this presentation, we will review and discuss QFN related reliability concerns and challenges, and propose Physics-of-Failure (PoF) based approaches to allow the confident introduction of QFN components into electronics products....

Publisher: DfR Solutions (acquired by ANSYS Inc)