Electronics Manufacturing Technical Articles

Assembly Process Feasibility of Low/No Silver Alloy Solder Paste Materials

Oct 02, 2014 | Jennifer Nguyen Ranilo Aranda, David Geiger, and Murad Kurwa

Sn3.0Ag0.5Cu (SAC305) is the most popular near eutectic lead-free alloy used in the manufacturing processes. Over the last several years, the price of silver has dramatically increased driving a desire for lower silver alloy alternatives. As the results, there is a significant increase in the number of alternative low/no silver lead-free solder alloys available in the industry recently.

In this paper, we'll present the performance and process capability of various low/no silver alloy solder pastes. Data from printability, wetting test, slump test, solder ball test, voiding, etc… will be discussed and compared with the control SAC305 solder paste. Benefits and concerns of using low/no silver alloy solder paste materials will also be addressed....

Publisher: Flex (Flextronics International)

Taking the LED Pick and Place Challenge

Sep 25, 2014 | Joshua J. Markle.

For the past few years there has been a shift in the Lighting Industry that has carried over to the surface mount technology assembly line. What is this shift you may ask? Well it is the LED revolution. This revolution or change in lighting has some very promising results already in practice and many more companies looking to implement the LED technology into their product portfolio's. With a number of companies looking to expand their portfolio to include LED fixtures there has been an increase in the number of companies that have started their own SMT lines, as well as a significant number of contract manufacturers to meet this new industries demands (...)

This presentation will discuss some issues in the pick and place process for LEDs and presents a method to troubleshoot and resolve these issues....

Publisher: Cree, Inc.

Predicting the Lifetime of the PCB - From Experiment to Simulation

Sep 18, 2014 | Markus Leitgeb, AT&S Peter Fuchs, PCCL.

Two major drivers in electronic industry are electrical and mechanical miniaturization. Both induce major changes in the material selection as well as in the design. Nevertheless, the mechanical and thermal reliability of a Printed Circuit Board (PCB) has to remain at the same high level or even increase (e.g. multiple lead-free soldering). To achieve these reliability targets, extensive testing has to be done with bare PCB as well as assembled PCB. These tests are time consuming and cost intensive. The PCBs have to be produced, assembled, tested and finally a detailed failure analysis is required to be performed.

This paper examines the development of our concept and has the potential to enable the prediction of the lifetime of the PCB using accelerated testing methods and finite element simulations....

Publisher: AT&S

Plastic vs Metal Stencils for Prototype Printing

Sep 11, 2014 | Bob Wettermann.

This article goes through the pluses and minuses of using plastic stencils for DIY prototypes. The release efficiency is measured and "rules of thumb" for using one type vs another is explained....

Publisher: BEST Inc.

Reliability of Reworked QFNs

Sep 11, 2014 | CRANE.

In this DOD study the reliability of reworked QFNs is studied with the outcome being that a stay in place stencil does not impact the reliability of a QFN reworked using this technique...

Publisher: BEST Inc.

Reballing a QFN Simplifies QFN Rework

Sep 11, 2014 | Bob Wettermann.

There are a variety of methods one can use to rework QFNs. This paper explains one of the ways to get very little center ground voiding while making it easy to place a tiny component with almost no keep out areas....

Publisher: BEST Inc.

Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead.

Sep 04, 2014 | U. Guin, M. Tehranipoor - ECE Department, University of Connecticut, D. DiMase - Honeywell Inc.,

The counterfeiting of electronic components has become a major challenge in the 21st century. The electronic component supply chain has been greatly affected by widespread counterfeit incidents. A specialized service of testing, detection, and avoidance must be created to tackle the worldwide outbreak of counterfeit integrated circuits (ICs). So far, there are standards and programs in place for outlining the testing, documenting, and reporting procedures. However, there is not yet enough research addressing the detection and avoidance of such counterfeit parts.

In this paper we will present, in detail, all types of counterfeits, the defects present in them, and their detection methods. We will then describe the challenges to implementing these test methods and to their effectiveness. We will present several anti-counterfeit measures to prevent this widespread counterfeiting, and we also consider the effectiveness and limitations of these anti-counterfeiting techniques....

Publisher: Honeywell International

The Effect of Coating and Potting on the Reliability of QFN Devices.

Aug 28, 2014 | Greg Caswell, Cheryl Tulkoff.

The fastest growing package types in the electronics industry today are Bottom Termination Components (BTCs). While the advantages of BTCs are well documented, they pose significant reliability challenges to users. One of the most common drivers for reliability failures is the inappropriate adoption of new technologies. This is especially true for new component packaging like BTCs. Obtaining relevant information can be difficult since information is often segmented and the focus is on design opportunities not on reliability risks (...)

Commonly used conformal coating and potting processes have resulted in shortened fatigue life under thermal cycling conditions. Why do conformal coating and potting reduce fatigue life? This paper details work undertaken to understand the mechanisms underlying this reduction. Verification and determination of mechanical properties of some common materials are performed and highlighted. Recommendations for material selection and housing design are also given....

Publisher: DfR Solutions (acquired by ANSYS Inc)

Implementing Warpage Management: A Five-Step Process for EMS Providers

Aug 19, 2014 | Ken Chiavone

Warpage management consists of planning, measuring, analyzing, sharing, and reacting to data related to the surface shapes of electronics components as they change throughout the reflow assembly process. Leading semiconductor manufacturers have had warpage management systems in place for ten years or more, mainly because microchip package warpage must be understood and compensated for in order to attain high assembly yields. Similarly, newer device architectures such as package-on-package and system-on-a-chip are sensitive to warpage-related assembly issues, and companies involved in the manufacture and assembly of these devices tend to have the most advanced warpage management programs....

Publisher: Akrometrix

Advanced Second Level Assembly Analysis Techniques - Troubleshooting Head-In-Pillow, Opens, and Shorts with Dual Full-Field 3D Surface Warpage Data Sets/

Aug 19, 2014 | Ken Chiavone

SMT assembly planning and failure analysis of surface mount assembly defects often include component warpage evaluation. Coplanarity values of Integrated Circuit packages have traditionally been used to establish pass/fail limits. As surface mount components become smaller, with denser interconnect arrays, and processes such package-on-package assembly become prevalent, advanced methods using dual surface full-field data become critical for effective Assembly Planning, Quality Assurance, and Failure Analysis. A more complete approach than just measuring the coplanarity of the package is needed. Analyzing the gap between two surfaces that are constantly changing during the reflow thermal cycle is required, to effectively address the challenges of modern SMT assembly....

Publisher: Akrometrix