DI2CS - I2C Bus Interface Slave

DI2CS - I2C Bus Interface Slave Description:

Overview

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CS core provides an interface between a microprocessor/microcontroller and an I2C bus. It can works as a slave transmitter or slave receiver depending on working mode determined by a master device. The DI2CS core incorporates all features required by the latest I2C specification including clock synchronization, arbitration and High-speed transmission mode. The DI2CS supports all the transmission speed modes.
DI2CS is a technology independent design that can be implemented in a variety of process technologies.

Features

■ Conforms to v.2.1 of the I2C specification
■ Slave operation
■ Master transmitter
■ Master receiver
■ Supports 3 transmission speed modes
■ Standard (up to 100 kb/s)
■ Fast (up to 400 kb/s)
■ High Speed (up to 3,4 Mb/s)
■ Allows operation from a wide range of input clock frequencies
■ Simple interface allows easy connection to microprocessor/microcontroller devices
■ Interrupt generation
■ User-defined data setup time
■ Fully synthesizable
■ Static synchronous design
■ Positive edge clocking and no internal tri-states
■ Scan test ready

Benefits

■ Getting a sillicon proven IP
■ Rapid prototyping and time-to-market reduction
■ Design risk elimination
■ Development costs reduction
■ Full customization
■ Technological independence (VHDL and Verilog)
■ Global sales network
■ Professional service

Tech Specs

Type - Soft Firm  

Availability - Now

TSMC - Silicon Proven : 130nm (CL013G)

UMC - Silicon Proven : 130nm

FPGA Technology:

Altera: Stratix II, Stratix GX, Stratix, HardCopy, FLEX 10K, Cyclone, APEX II, APEX 20KE, APEX 20KC,
Xilinx: Virtex-II Pro, Spartan-3,
Actel: SX-A, RTSX-SU, RTAX-S/SL/DSP, ProASICPLUS, MX, eX, Axcelerator,