SMT Equipment

DI2CSB - I2C Bus Interface Slave (base version)

Company Information:

DCD is a leading IP Core provider and SoC design house. The company was founded in 1999 and since the early beginning is considered as an expert in IP Cores architecture improvements.

Bytom, Poland

Consultant / Service Provider

  • Phone +48 32 282 82 66

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Company Postings:

(43) products in the catalog

Category:

Other

Offered by:

Digital Core Design

   

DI2CSB - I2C Bus Interface Slave (base version) Description:

Overview

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CSB provides an interface between a passive target device e.g. memory, LCD display, pressure sensors etc. and an I2C bus. It can works as a slave receiver or transmitter depending on working mode determined by a master device. Very simple interface, composed with the read, write and data signals, allows easy connection to the target devices. The core doesn’t required programming and is ready to work after power up/reset. The read, write, burst read, burst write and repeated start transmissions are automatically recognized by the core. The core incorporates all features required by I2C specification. The DI2CSB supports the following transmission modes: Standard, Fast and High Speed.
DI2CSB is a technology independent design that can be implemented in a variety of process technologies.


Features


■ Conforms to v.2.1 of the I2C specification
■ Slave operation
■ Master transmitter
■ Master receiver
■ Supports 3 transmission speed modes
■ Standard (up to 100 kb/s)
■ Fast (up to 400 kb/s)
■ High Speed (up to 3,4 Mb/s)
■ Allows operation from a wide range of input clock frequencies
■ Support for reads, writes, burst reads, burst writes, and repeated start
■ 7-bit addressing
■ No programming required
■ Simple interface allows easy connection to target device e.g. memory, LCD display, pressure sensors etc.
■ Fully synthesizable
■ Static synchronous design
■ Positive edge clocking and no internal tri-states
■ Scan test ready


Benefits


■ Getting a sillicon proven IP
■ Rapid prototyping and time-to-market reduction
■ Design risk elimination
■ Development costs reduction
■ Full customization
■ Technological independence (VHDL and Verilog)
■ Global sales network
■ Professional service


Tech Specs

FPGA - Altera, Xilinx, Lattice

Type - Soft Firm  

Availability - Now

TSMC - Silicon Proven : 130nm (CL013G)

UMC - Silicon Proven : 130nm

FPGA Technology:

Altera: Stratix II, Stratix GX, Stratix, HardCopy, FLEX 10K, Cyclone, APEX II, APEX 20KE, APEX 20KC,
Xilinx: Virtex-II Pro, Spartan-3,
Actel: SX-A, RTSX-SU, RTAX-S/SL/DSP, ProASICPLUS, MX, eX, Axcelerator,

DI2CSB - I2C Bus Interface Slave (base version) was added in Apr 2012

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