Summary of Qualifications: |
DEBTANU BASU
40 Fountain Head Road
Toronto, ON M3J2V1
(416) 514 0619
Cell: 416 258 7488
E-mail: debtanubasu@aol.com
With more than six years of experience in the field of flip chip technologies seeking a challenging technical position in the field of advanced packging
PROFILE :
� Over five years progressive experience in process development including component assembly (SMT) and module assembly. Experienced with varied types of solder reflow techniques
� Comprehensive knowledge in executing DOE, statistical process control, yield improvement and failure mode analysis. In-depth knowledge in Statistical Process Control
� Experience includes procure and commissioning equipments and dealing with contract manufacturer as well as customers
� Proficient in MS Windows, MS Office (Word, Excel, Power Point), MS project and statistical softwares like Statgraphics and Minitab. Experienced in using MESA or Matrix production softwares
PROFESSIONAL EXPERIENCE:
York University, Toronto (2003 -2005)
Research Assistant
� Worked on electro plating of magnetic multilayer (for memory devices). Electrodeposition of ferromagnetic and antiferromagnetic layers on gold substrate
� Characterization of magnetization (hystresis) using laser deflection
Agere Systems (formerly Lucent Technologies), Pennsylvania (2001 � 2002)
Process Development Engineer, Optoelectronics Packaging
� Responsibilities included process characterizations, DOE, equipment identifications, fixture design and piece part qualifications
� Suported pilot productions and yields prior transferring to full scale manufacturing
� Successfully conducted engineering training for off-shore manufacturing
Major Projects undertaken at Agere Systems:
High Speed (40 GB/S) Receiver
� Worked with offshore IC vendor for developing flip chip and with internal IC department for developing a bumping process for Flip Chips
� Developed and characterised a cost effective global process for bonding IC and discretes on optical sub-assembly using autobonder. Tack and Gang Reflow process developed was transferable over a wide range of product lines
10 Gig Ethernet Transceiver
Responsible for module assembly
� Developed and characterized process for optics attach to module housing
MEMS Optical Switch:
� Identified and qualified new bonder for flip chip attach in MEMS optical switches
Semtech Corporation, Texas (1999 - 2001)
Development Engineer (Flip Chip)
� Efficiently handeled the purchase and procurement of equipments used in back end processess which were worth $2.2 million dollar. Completed project successfully from floor design and equipment procurement to full time production in less than eleven months
� Evaluated and qualified flip chip out sourcing. Was responsible for initial high volume flip chip production.
� Established process specification for bump shear strength. Procured and commissioned new shear tester (Dage 4000) in production. Developed process for board level testing
� Procured and commissioned state of the art automatic visual inspection station (August NSX 85) for bumped wafers. Performed product set-ups for number of new devices. Programmed machine to optimise throughput and defect sensitivity. Established sampling scheme for bump height measurements
� Developed post fabrication flip chip process flow traveller and documented all individual operations per Semtech�s document control scheme and ISO 9000 requirements
International Micro Industries, Inc., New Jersey ( 1997 - 1999)
Process Chemist
� Established a controlled production process for gold bump electroplating for a key customer of IMI
� Developed tin/lead and Copper bumping process for a number of companies which helped IMI to get new business
� Developed thick photoresist application and selective under bump metal etching process for different solder compositions
� Process developed for Chip bonding on glass, board and flex circuits
� Established a solid Statistical Process Control program for a key customer of IMI
� Laid out a complete floor plan for setting up a high volume bumping facility in corporate�s new location
University of Rhode Island (1993 - 95)
Research Assistant
� Conducted research on Synthesis and Characterization of Conductive Polymers
Education
Master of Science in Chemistry
University of Rhode Island
1995
� Graduate research was on conductive polymer
Master of Science in Chemistry
Indian Institute of Technology 1991
PUBLICATION:
A Low Cost, low I/O Wafer Level CSP for ESD Protection
Vrej Barkhordarian, Bill Russel, Hani Gaske, and Debtanu Basu, Semtech Corporation
Reza Ghaffarin, Jet Propulsion Laboratory
Conference Proceedings (809), SMT International 2000, Chicago, Illinois
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