Wave Solder of SOIC/SOT Packages

My company is looking for higher density for card layout. One suggestion has been locating active components packaged in SOT's and SOIC's on the B-side of the card. This in turn will require wave soldering of the above mentioned components. When I discuss this with the component suppliers they take a conservative approach and say they do not recommend this. I am indeed concerned from a reliability standpoint. I would appreciate any response to the questions below.

Does your company use active components in the wave solder process?

If so, what types of packages do you allow?

What process do you use to qualify for this application?

Are there any special restrictions utilized? (eg. bakeout prior to wave solder, maintaining certain preheat to solder temperature deltas, etc.)

Any other information that may be pertinent?

Thanks for your help in this matter.

Jeff Long

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| My company is looking for higher density for card layout. One suggestion has been locating active components packaged in SOT's and SOIC's on the B-side of the card. This in turn will require wave soldering of the above mentioned components. When I discuss this with the component suppliers they take a conservative approach and say they do not recommend this. I am indeed concerned from a reliability standpoint. I would appreciate any response to the questions below. | | Does your company use active components in the wave solder process? | | If so, what types of packages do you allow? | | What process do you use to qualify for this application? | | Are there any special restrictions utilized? (eg. bakeout prior to wave solder, maintaining certain preheat to solder temperature deltas, etc.) | | Any other information that may be pertinent? | | Thanks for your help in this matter. | | Jeff Long |

Dear Jeff,

There are a lot of companies out there, which successfully solder SOT/SO packages. With the proper pad design, component orientation with respect to the wave and a robust wave soldering process, it shouldn't be a problem.

Frank J. de Klein, VITRONICS SOLTEC

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| My company is looking for higher density for card layout. One suggestion has been locating active components packaged in SOT's and SOIC's on the B-side of the card. This in turn will require wave soldering of the above mentioned components. When I discuss this with the component suppliers they take a conservative approach and say they do not recommend this. I am indeed concerned from a reliability standpoint. I would appreciate any response to the questions below. | | Does your company use active components in the wave solder process? | | If so, what types of packages do you allow? | | What process do you use to qualify for this application? | | Are there any special restrictions utilized? (eg. bakeout prior to wave solder, maintaining certain preheat to solder temperature deltas, etc.) | | Any other information that may be pertinent? | | Thanks for your help in this matter. | | Jeff Long | Jeff,

We wave solder SOT's & SOIC's all the time. I've been making solder joints for 10 years now, and I've always waved these packages, so I can't help you on the qualification part. The fact that they've been getting waved for my 10 years of experience may put you more at ease for wave soldering them in general, however.

Standard wave profiles work fine, i.e. 220 degree preheat and 475 -500 degree wave temperatures. Chip waves help a lot with SOT's.

Orient both packages so that the leads are on the sides of the components as they go through the waves.

Put "solder theives" on the SOIC's to prevent bridging. That means put an extra pad on the front and back of the footprint. an SOIC-16 would then have 20 pads. The last two leads always want to bridge. The trailing pad is a dummy that will "rob" the solder bridge from the two previous leads and create a bridge to the elecrtically non-functional dummy. Put one on both sides in case you want to run the board in the opposite direction.

If you have a limited wave solder process or more concerns, make a test board where you try different footprints. Other than that, it oughta be a pice of cake.

Good Luck,

Chrys

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| | My company is looking for higher density for card layout. One suggestion has been locating active components packaged in SOT's and SOIC's on the B-side of the card. This in turn will require wave soldering of the above mentioned components. When I discuss this with the component suppliers they take a conservative approach and say they do not recommend this. I am indeed concerned from a reliability standpoint. I would appreciate any response to the questions below. | | | | Does your company use active components in the wave solder process? | | | | If so, what types of packages do you allow? | | | | What process do you use to qualify for this application? | | | | Are there any special restrictions utilized? (eg. bakeout prior to wave solder, maintaining certain preheat to solder temperature deltas, etc.) | | | | Any other information that may be pertinent? | | | | Thanks for your help in this matter. | | | | Jeff Long | | | | Dear Jeff, | |Why, why, why, do you assume that the 'B' side of the board must be wave soldered. If you construct an open frame carrier from a thermally stable material (eg Durapol) you can pass the board through the reflow oven a second time. The adhesive qualities of molten solder are pretty substantial and the components on the lower side will remain in place (assuming that the oven transport medium is vibration free eg mesh). Obviously devices which have a large mass to pad ratio eg electorlytics and power inductors, should not be on the bottom of the board. Give it a try and save on adhesive and its application.

Regards Tony B

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