Technical Library: lead-free solder (Page 10 of 12)

Strength of Lead-free BGA Spheres in High Speed Loading

Technical Library | 2008-04-08 17:42:27.0

Concern about the failure of lead-free BGA packages when portable devices such as cell phones are accidentally dropped and a general concern about the resistance of these packages under shock loading has prompted an interest in the impact strength of the soldered BGA connection. This paper reports the results of the measurement of the impact strength of lead-free 0.5±0.01mm diameter BGA spheres on 0.42mm solder mask defined pads on copper/OSP and ENIG substrates using recently developed equipment that can load individual BGA spheres at high strain rates in shear and tension.

Nihon Superior Co., Ltd.

Evaluating the Mechanical Reliability of Ball Grid Array (BGA) Flexible Surface-Mount Electronics Packaging under Isothermal Ageing

Technical Library | 2015-02-12 16:57:56.0

Electronic systems are known to be affected by the environmental and mechanical conditions, such as humidity, temperature, thermal shocks and vibration. These adverse environmental operating conditions, with time, could degrade the mechanical efficiency of the system and might lead to catastrophic failures.The aim of this study is to investigate the mechanical integrity of lead-free ball grid array (BGA) solder joints subjected to isothermal ageing at 150°C for up to 1000 hours. Upon ageing at 150°C the Sn-3.5Ag solder alloy initially age-softened for up to 200 hours. This behaviour was linked to the coarsening of grains. When aged beyond 200 hours the shear strength was found to increase up to 400 hours. This age-hardening was correlated with precipitation of hard Ag3Sn particles in Sn matrix. Further ageing resulted in gradual decrease in shear strength. This can be explained as the combined effect of precipitation coarsening and growth of intermetallic layer. The fractured surfaces of the broken solder balls were also investigated under a Scanning Electron Microscope. The shear failures were generally due to ductile fractures in bulk solders irrespective of the ageing time.

School of Engineering, University of Greenwich

Lead-free and Tin-lead Assembly and Reliability of Fine-pitch Wafer-Level CSPs

Technical Library | 2007-05-31 19:05:55.0

This paper discusses solder paste printing and flux dipping assembly processes for 0.4 and 0.5mm pitch lead-free WLCSPs and the corresponding assembly results and thermal cyclic reliability obtained. Variables evaluated include reflow ambient, paste type, and stencil design. Reliability is also compared to results for the same components assembled under identical conditions using SnPb solder.

Universal Instruments Corporation

A Practical Guide to Achieving Lead-Free Electronics Assembly

Technical Library | 2007-10-18 13:42:45.0

To successfully achieve lead-free electronics assembly, each participant in the manufacturing process, from purchasing to engineering to maintenance to Quality/Inspection, must have a solid understanding of the changes required of them. This pertains to considerations regarding design, components, PWBs, solder alloys, fluxe s, printing, reflow, wave soldering, rework, cleaning, equipment wear & tear and inspection.

AIM Solder

Effect of Silver in Common Lead-Free Alloys

Technical Library | 2023-01-02 17:50:34.0

Silver bearing alloys have been used in electronics soldering for many years. Silver has been used in tin-lead solders (Sn62Pb36Ag2) to combat silver scavenging from silver plated electronic components as well as to improve thermal fatigue resistance. Many of the common lead-free alloys contain some amount of silver. Silver bearing alloys have good electrical and thermal conductivity as well as the ability to wet to the common surface finishes used in printed wiring assemblies, thus giving it all the attributes needed for an electronic solder alloy. Presence of silver in Sn based solders increases the bulk solder modulus and is generally believed to improve resistance to fatigue from thermal cycles. Increased solder modulus can be advantageous or disadvantageous depending on the desired performance attribute. For example in high strain rate situations, higher modulus of the bulk solders results in lower life time. A wide variety of leaded and lead-free

Cookson Electronics Assembly Materials

Optimizing Stencil Design For Lead-Free Smt Processing

Technical Library | 2023-06-12 19:18:24.0

As any new technology emerges, increasing levels of refinement are required to facilitate the mainstream implementation and continual improvement processes. In the case of lead-free processing, the initial hurdles of alloy and chemistry selection are cleared on the first level, providing a base process. The understanding gained from early work on the base process leads to the next level of refinement in optimizing the primary factors that influence yield. These factors may include thermal profiles, PWB surface finishes, component metallization, solder mask selection or stencil design.

Cookson Electronics Assembly Materials

Effects of PCB Substrate Surface Finish and Flux on Solderability of Lead-Free SAC305 Alloy

Technical Library | 2021-10-20 18:21:06.0

The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.

Foundry Research Institute

Novel Approach to Void Reduction Using Microflux Coated Solder Preforms for QFN/BTC Packages that Generate Heat

Technical Library | 2019-08-07 22:56:45.0

The requirement to reconsider traditional soldering methods is becoming more relevant as the demand for bottom terminated components (QFN/BTC) increases. Thermal pads under said components are designed to enhance the thermal and electrical performance of the component and ultimately allow the component to run more efficiently. Additionally, low voiding is important in decreasing the current path of the circuit to maximize high speed and RF performances. The demand to develop smaller, more reliable, packages has seen voiding requirements decrease below 15 percent and in some instances, below 10 percent.Earlier work has demonstrated the use of micro-fluxed solder preforms as a mechanism to reduce voiding. The current work builds upon these results to focus on developing an engineered approach to void reduction in leadless components (QFN) through increasing understanding of how processing parameters and a use of custom designed micro-fluxed preforms interact. Leveraging the use of a micro-fluxed solder preform in conjunction with low voiding solder paste, stencil design, and application knowhow are critical factors in determining voiding in QFN packages. The study presented seeks to understand the vectors that can contribute to voiding such as PCB pad finish, reflow profile, reflow atmosphere, via configuration, and ultimately solder design.A collaboration between three companies consisting of solder materials supplier, a power semiconductor supplier, and an electronic assembly manufacturer worked together for an in-depth study into the effectiveness of solder preforms at reducing voiding under some of the most prevalent bottom terminated components packages. The effects of factors such as thermal pad size, finish on PCB, preform types, stencil design, reflow profile and atmosphere, have been evaluated using lead-free SAC305 low voiding solder paste and micro-fluxed preforms. Design and manufacturing rules developed from this work will be discussed.

Alpha Assembly Solutions

Photonic Flash Soldering on Flex Foils for Flexible Electronic Systems

Technical Library | 2021-11-03 16:49:59.0

Ultrathin bare die chips were soldered using a novel soldering technology. Using homogeneous flash light generated by high-power xenon flash lamp the dummy components and the bare die NFC chips were successfully soldered to copper tracks on polyimide (PI) and polyethylene terephthalate (PET) flex foils by using industry standard Sn-Ag-Cu lead free alloys. Due to the selectivity of light absorption, a limited temperature increase was observed in the PET substrates while the chip and copper tracks were rapidly heated to a temperatures above the solder melting temperature. This allowed to successfully soldered components onto the delicate polyethylene foil substrates using lead-free alloys with liquidus temperatures above 200 °C. It was shown that by preheating components above the decomposition temperature of solder paste flux with a set of short low intensity pulses the processing window could be significantly extended compared to the process with direct illumination of chips with high intensity flash pulse. Furthermore, it was demonstrated that with localized tuning of pulse intensity components having different heat capacity could be simultaneously soldered using a single flash pulse.

NovaCentrix

Best Practices Reflow Profiling for Lead-Free SMT Assembly

Technical Library | 2013-06-05 23:14:44.0

The combination of higher lead-free process temperatures, smaller print deposits, and temperature restraints on electrical components has created difficult challenges in optimizing the reflow process. Not only are the electronic components and the PWB at risk, but the ability to achieve a robust solder joint becomes difficult, especially if the PCB is thermally massive. In addition, the constant miniaturization of electronic components, hence smaller solder paste deposits, may require the use of smaller particle-sized powders (...) This paper is a summary of best practices in optimizing the reflow process to meet these challenges of higher reflow temperatures, smaller print deposits, decreased powder particle size, and their affect on the reflow process.

Indium Corporation


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