Technical Library: substrate (Page 6 of 11)

Autorouting Techniques for Mulitchip Modules

Technical Library | 2001-04-24 10:38:38.0

Many PCB designers are interested in taking advantage of Multichip Modules, but are unfamiliar with the technology. While the design process is very much the same, MCM manufacturing processes vary dramatically. MCM routing requirements are dictated by the manufacturing process and types of components. Components mounted on MCM substrates are predominantly, if not exclusively, bare chips. As a result, the component body and I/O pins are no longer constrained to industry standard pin counts and form factors as are packaged components...

Mentor Graphics

Meeting Heat And CTE Challenges Of PCBs And ICs

Technical Library | 2008-11-13 00:06:32.0

The electronics industry is facing issues with hot spots, solder joint stresses and Coefficient of Thermal Expansion (CTE) mismatch between PCB and IC substrate. Flip chip type packages for example have very low CTE compared to traditional PCB material. Thus it is necessary to have low CTE printed circuit boards in order to keep solder joint intact with such low CTE packages. There are currently several materials available in the market to address thermal and CTE challenges but each material has its own advantages and limitations...

Stablcor

Imbedded Component/Die Technology (IC/DT®)

Technical Library | 2009-02-26 03:25:09.0

STI has developed a patented1 packaging technology coined Imbedded Component/Die Technology (IC/DT®) to integrate multiple subsystems within an electronics assembly into a single, advanced, high-density assembly. Imbedded Component/Die Technology (IC/DT®) enables the manufacturing and assembly of smaller, lighter, and more technologically advanced high density CCAs through imbedding unpackaged components in a 3-D laminate substrate with integrated thermal management

STI Electronics

Design and Process Development for the Assembly of 01005 Passive Components

Technical Library | 2018-03-05 11:22:48.0

Growing demands for smaller electronic assemblies has resulted in reduced sizes of passive components, requiring the introduction of newer components, such as the 01005 devices. Component miniaturization presents significant challenges to the traditional surface mount assembly process. A successful assembly solution for these 01005 devices should be repeatable and reproducible, and should include guidelines for (i) the selection of solder paste and (ii) appropriate stencil and substrate pad design, and should ensure strict process control standards.

Sanmina-SCI

The role that sapphire ceramic PCB play in MEMSdevices

Technical Library | 2023-05-10 01:39:38.0

DPC (DirectPlatingCopper) thin film process is a method of prepare copper film using magnetron sputtering technology. This process is a process in which the copper target with the target material is placed in a true cavity chamber, and plasma is generated on the copper target surface by magnetron sputtering technology. The ions in the plasma are bombarded on the surface of the target, which is sputtered into fine particles and deposited on the substrate to form a copper film.

Folysky Technology(Wuhan)Co.,Ltd

Component Level Reliability For High Temperature Power Computing With SAC305 And Alternative High Reliability Solders

Technical Library | 2017-02-16 16:53:49.0

This experiment considers the reliability of a variety of different electronic components and evaluates them on 0.200” power computing printed circuit boards with OSP. Single-sided assemblies were built separately for the Top-side and Bottom-side of the boards. This data is for boards on the FR4-06 substrate.This paper was originally published by SMTA in the Proceedings of SMTA International.

Auburn University

High Frequency Electrical Performance and Thermo-Mechanical Reliability of Fine-Pitch, Copper - Metallized Through-Package-Vias (TPVs) in Ultra - thin Glass Interposers

Technical Library | 2017-08-10 01:23:22.0

This paper demonstrates the high frequency performance and thermo-mechanical reliability of through vias with 25 μm diameter at 50 μm pitch in 100 μm thin glass substrates. Scaling of through via interconnect diameter and pitch has several electrical performance advantages for high bandwidth 2.5D interposers as well as mm-wave components for 5G modules.

Georgia Institute of Technology

Laser-Based Methodology for the Application of Glass as a Dielectric and Cu Pattern Carrier for Printed Circuit Boards

Technical Library | 2018-11-07 20:48:01.0

Glass offers a number of advantages as a dielectric material, such as a low coefficient of thermal expansion (CTE), high dimensional stability, high thermal conductivity and suitable dielectric constant. These properties make glass an ideal candidate for, among other things, package substrate and high-frequency PCB applications. We report here a novel process for the production of printed circuit boards and integrated circuit packaging using glass as both a dielectric medium and a platform for wiring simultaneously.

Electro Scientific Industries

Sn-3.0Ag-0.5Cu/Sn-58Bi composite solder joint assembled using a low-temperature reflow process for PoP technology

Technical Library | 2021-01-13 21:34:29.0

Package-on-Package (PoP) is a popular technology for fabricating chipsets of accelerated processing units. However, the coefficient of thermal expansion mismatch between Si chips and polymer substrates induces thermal warpage during the reflow process. As such, the reflow temperature and reliability of solder joints are critical aspects of PoP. Although Sne58Bi is a good candidate for low-temperature processes, its brittleness causes other reliability issues. In this study, an in-situ observation was performed on composite solders (CSs) made of ...

Osaka University

Electromechanical Reliability Testing of Flexible Hybrid Electronics Incorporating FleX Silicon-on-Polymer ICs

Technical Library | 2021-08-18 01:24:20.0

Flexible Hybrid Electronics combine the best characteristics of printed electronics and silicon ICs to create high performance, ultra-thin, physically flexible systems. New static and dynamic tests are being developed to evaluate the performance of these systems. Dynamic radius of curvature and torsional test results are presented for a flexible hybrid electronics system with a FleX Silicon-on-Polymer operational amplifier manufactured in an 180nm CMOS process with 4-levels of metal interconnect mounted on a PET substrate.

American Semiconductor, Inc.


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