Electronics Forum: void reduction (Page 4 of 4)

QFN PCB Pad no Drain Hole

Electronics Forum | Fri May 31 18:00:55 EDT 2013 | hegemon

With regards to first picture.(Large themal vias) I would attempt to measure the area of the ground pad, less the area of the "drain" holes or Thermal Vias. From that result I would reduce the aperture to account for about 50% coverage of that remai

Re: Stencil Printing

Electronics Forum | Thu Jul 20 14:52:05 EDT 2000 | Bob Willis

If you are talking about Pin In Hole Reflow that is not true, I hope it was not my friends at Speedline that told you that. Stencil printing of paste for through hole reflow can be done. If you get all the parameters right it can give you joints lik

Need Expert Support

Electronics Forum | Tue Mar 13 16:05:30 EST 2001 | rob_thomas

Hi, can you definitely attribute the 30%yield to poor bga soldering? What is your high flyer defect encountered on the failed boards.Is this ICT ,flying probe ,functional test yield? Can you determine a defect pattern? Did your subcontractor provided

aluminium wire bonding on Electroless Nickel + Immersion gold

Electronics Forum | Mon Aug 27 15:06:29 EDT 2001 | davef

This otta push Wolfgang over the top ... Recommended reading G.G. Harman, Wire Bonding in Microelectronics : Materials, Processes, Reliability, and Yield, 2nd edition, McGraw-Hill Electronic Packaging and Interconnection Series, 1997. G.G. Harman, R

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