Technical Library | 2014-05-08 16:34:16.0
Bare die mounting on multi-device substrates has been in use in the microelectronics industry since the 1960s. The aerospace industry’s hybrid modules and IBM’s Solid Logic Technology were early implementations that were developed in the 1960’s. The technologies progressed on a steady level until the mid 1990’s when, with the advent of BGA packaging and chip scale packages, the microelectronics industry started a wholesale move to area array packaging. This paper outlines the challenges for both traditional wire-bond die attached to a printed wiring board (pwb), to the more recent applications of bumped die attached to a high performance substrate.
Technical Library | 2018-08-22 14:05:42.0
Glass substrates are emerging as a key alternative to silicon and conventional organic substrates for high-density and high-performance systems due to their outstanding dimensional stability, enabling sub-5-µm lithographic design rules, excellent electrical performance, and unique mechanical properties, key in achieving board-level reliability at body sizes larger than 15 × 15 mm2. This paper describes the first demonstration of the board-level reliability of such large, ultrathin glass ball grid array (BGA) packages directly mounted onto a system board, considering both their thermal cycling and drop-test performances.
Technical Library | 2020-09-16 21:24:56.0
Additive manufacturing processes typically used for mechanical parts can be combined with enhanced technologies for electronics production to enable a highly flexible manufacturing of personalized 3D electronic devices. To illustrate different approaches for implementing electrical and electronic functionality, conductive paths and electronic components were embedded in a powder bed printed substrate using an enhanced 3D printer. In addition, a modified Aerosol Jet printing process and assembly technologies adapted from the technology of Molded Interconnect Devices were applied to print circuit patterns and to electrically interconnect components on the surface of the 3D substrates.
Institute for Factory Automation and Production Systems (FAPS)
Technical Library | 2019-06-20 00:09:49.0
It is well known that during service the layer of Cu6Sn5 intermetallic at the interface between the solder and a Cu substrate grows but the usual concern has been that if this layer gets too thick it will be the brittleness of this intermetallic that will compromise the reliability of the joint, particularly in impact loading. There is another level of concern when the Cu-rich Cu3Sn phase starts to develop at the Cu6Sn5/Cu interface and an imbalance in the diffusion of atomic species, Sn and Cu, across that interface results in the formation at the Cu3Sn/Cu interface of Kirkendall voids, which can also compromise reliability in impact loading. However, when, as is the case in some microelectronics, the copper substrate is thin in relation to the volume of solder in the joint an overriding concern is that all of the Cu will be consumed by reaction with Sn to form these intermetallics.This paper reports an investigation into the kinetics of the growth of the interfacial intermetallic, and the consequent reduction in the thickness of the Cu substrate in solder joints made with three alloys, Sn-3.0Ag-0.5Cu, Sn-0.7Cu-0.05Ni and Sn-1.5Bi-0.7Cu-0.05Ni.
Technical Library | 2018-03-28 14:54:36.0
Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.
Technical Library | 2020-12-24 02:50:56.0
A method for packaging integrated circuit silicon die in thin flexible circuits has been investigated that enables circuits to be subsequently integrated within textile yarns. This paper presents an investigation into the required materials and component dimensions in order to maximize the reliability of the packaging method. Two die sizes of 3.5 mm×8 mm× 0.53 mm and 2 mm×2 mm×0.1 mm have been simulated and evaluated experimentally under shear load and during bending. The shear and bending experimental results show good agreement with the simulation results and verify the simulated optimal thickness of the adhesive layer. Three underfill adhesives (EP30AO, EP37-3FLF, and Epo-Tek 301 2fl), three highly flexible adhesives (Loctite 4860, Loctite 480, and Loctite 4902), and three substrates (Kapton,Mylar, and PEEK) have been evaluated, and the optimal thickness of each is found. The Kapton substrate, together with the EP37-3FLF adhesive, was identified as the best materials combination with the optimum underfill and substrate thickness identified as 0.05 mm.
Technical Library | 2021-11-03 16:52:47.0
This paper proposes the integration of pulsed photonic sintering into multi-material additive manufacturing processes in order to produce multifunctional components that would be nearly impossible to produce any other way. Pulsed photonic curing uses high power Xenon flash lamps to thermally fuse printed nanomaterials such as conductive metal inks. To determine the feasibility of the proposed integration, three different polymer additive manufacturing materials were exposed to typical flash curing conditions using a Novacentrix Pulseforge 3300 system. FTIR analysis revealed virtually no change in the polymer substrates, thus indicating that the curing energy did not damage the polymer. Next, copper traces were printed on the same substrate, dried, and photonically cured to establish the feasibility of thermally fusing copper metal on the polymer additive manufacturing substrates. Although drying defects were observed, electrical resistivity values ranging from 0.081 to 0.103 Ω/sq. indicated that high temperature and easily oxidized metals can be successfully printed and cured on several commonly used polymer additive manufacturing materials. These results indicate that pulsed photonic curing holds tremendous promise as an enabling technology for next generation multimaterial additive manufacturing processes.
Technical Library | 2012-12-26 20:18:50.0
①Single side The basic flexible printed circuit board is used of substrate of single side pcb materials and coated coverlay after finishing printed. ②Double sided That is made of substrates of double sided printed circuit board with double surface coated coverlays after finishing printed. ③Single copper foil with double coverlays Single copper foil coated different coverlays with double surface after finishing printed. ④Air gap Laminating two single printed circuit board together with no glue and bare design to meet high flexibility requirements. ⑤Multilayer That is designed for three and above circuit layers by laminating single side printed circuit board or double sided printed circuit board. ⑥COF IC chips and electronic components are installed on the flexible circuit board directly. ⑦Rigid-Flexible PCB Combined to rigid PCB with supporting and flexible PCB with high flexibility.
Technical Library | 2015-09-23 22:08:32.0
A molded interconnect device (MID) is an injection molded thermoplastic substrate which incorporates a conductive circuit pattern and integrates both mechanical and electrical functions. (...) Flip chip bonding of bare die on MID can be employed to fully utilize MID’s advantage in device miniaturization. Compared to the traditional soldering process, thermo-compression bonding with gold stud bumps provides a clear advantage in its fine pitch capability. However, challenges also exist. Few studies have been made on thermocompression bonding on MID substrate, accordingly little information is available on process optimization, material compatibility and bonding reliability. Unlike solder reflow, there is no solder involved and no “self-alignment,” therefore the thermo-compression bonding process is significantly more dependent on the capability of the machine for chip assembly alignment.
Technical Library | 2017-11-22 12:38:51.0
The use of copper foils laminated to polyimide (PI) as flexible printed circuit board precursor is a standard practice in the PCB industry. We have previously described[1] an approach to very thin copper laminates of coating uniform layers of nano copper inks and converting them into conductive foils via photonic sintering with a multibulb conveyor system, which is consistent with roll-to-roll manufacturing. The copper thickness of these foils can be augmented by electroplating. Very thin copper layers enable etching fine lines in the flexible circuit. These films must adhere tenaciously to the polyimide substrate.In this paper, we investigate the factors which improve and inhibit adhesion. It was found that the ink composition, photonic sintering conditions, substrate pretreatment, and the inclusion of layers (metal and organic) intermediate between the copper and the polyimide are important.
