Technical Library | 2012-05-10 19:48:10.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Creep corrosion normally happens in the end system, PCB, connectors and components are widely noted due to the exposure of high sulfur environments under elevated humidity. In thi
Technical Library | 2012-08-09 20:33:45.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Corrosion resistance is becoming one of the most important topics in the electronics industry. Corrosion results in field failures and huge losses, which annually total several bi
Technical Library | 2020-11-15 21:01:24.0
ENIG, electroless nickel immersion gold is now a well-regarded finish used to enhance and preserve the solder-ability of copper circuits. EPIG, electroless palladium immersion gold, is a new surface finish also for enhancing and preserving solder-ability but with the advantage of eliminating Electroless Nickel from the deposit layer. This feature has become increasingly important with the increasing use of high frequeny PWB designs whereby nickel's magnetic properties are detrimental. We examine these two finishes and their respective soldering characteristics as plated and after steam aging and offer an explanation for the performance deviation.
Technical Library | 2015-11-25 14:15:12.0
In this study various printed circuit board surface finishes were evaluated, including: organic solderability preservative (OSP), plasma finish (PF), immersion silver (IAg), electroless nickel / immersion silver (ENIS), electroless nickel / immersion gold hi-phosphorus (ENIG Hi-P), and electroless nickel / electroless palladium / immersion gold (ENEPIG). To verify the performance of PF as a post-treatment option, it was added to IAg, ENIG Hi-P, and ENEPIG to compare with non-treated. A total of nine groups of PCB were evaluated. Each group contains 30 boards, with the exception on ENIS where only 8 boards were available.
Technical Library | 2017-10-19 01:17:56.0
Wetting balance testing has been an industry standard for evaluating the solderability of surface finishes on printed circuit boards (PCB) for many years. A Wetting Balance Curve showing Force as a function of Time, along with the individual data outputs "Time to Zero" T(0), "Time to Two-Thirds Maximum Force" T(2/3), and "Maximum Force" F(max) are usually used to evaluate the solderability performance of various surface finishes. While a visual interpretation of the full curve is a quick way to compare various test results, this method is subjective and does not lend itself readily to a rigorous statistical evaluation. Therefore, very often, when a statistical evaluation is desired for comparing the solderability between different surface finishes or different test conditions, one of the individual parameters is chosen for convenience. However, focusing on a single output usually doesn't provide a complete picture of the solderability of the surface finish being evaluated.In this paper, various models here-in labeled as "point" and "area" models are generated using the three most commonly evaluated individual outputs T(0), T(2/3), and F(max). These models have been studied to quantify how well each describes the full wetting balance curve. The solderability score (S-Score) with ranking from 0 to 10 were given to quantify the wetting balance curve as the result of the model study, which corresponds well with experimental results.
Technical Library | 2013-01-17 15:34:33.0
The use of an electroless nickel, immersion gold (ENIG) surface finish comes with the inherent potential risk of Black Pad failures that can cause fracture embrittlement at the interface between the solder and the metal pad. As yet, there is no conclusive agreed solution to effectively eliminate Black Pad failures. The case studies presented are intended to add to the understanding of the Black Pad failure mechanism and to identify both the plating and the subsequent assembly processes and conditions that can help to prevent the likelihood of Black Pad occurring.
Technical Library | 2023-06-12 19:18:24.0
As any new technology emerges, increasing levels of refinement are required to facilitate the mainstream implementation and continual improvement processes. In the case of lead-free processing, the initial hurdles of alloy and chemistry selection are cleared on the first level, providing a base process. The understanding gained from early work on the base process leads to the next level of refinement in optimizing the primary factors that influence yield. These factors may include thermal profiles, PWB surface finishes, component metallization, solder mask selection or stencil design.
Technical Library | 2019-07-24 23:55:32.0
Voiding is a key concern for components with thermal planes because interruptions in Z-axis continuity of the solder joint will hinder thermal transfer. When assembling components with solder paste, there is a high propensity for voiding due to the confined nature of the solder paste deposits under the component. Once reflowed, many factors contribute to the amount of voiding in a solder joint such as the reflow profile, designs of the component, board and stencil, and material factors. This study will focus on the solder paste alloy and flux combination as well as profile and board surface finishes.
Technical Library | 2021-10-20 18:21:06.0
The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.
Technical Library | 2007-03-28 10:18:33.0
Legislation against the use of lead in electronics has been the driving force behind the use of lead-free solders, surface finishes, and component lead finishes. The major concern in using lead-free solders in the assembly and rework Chip Scale Packages (CSPs) is the relatively high temperatures that the components and the boards experience. Fine-pitch CSPs have very low standoff heights following assembly making inspection and rework of these components more difficult. One other concern pertinent to rework is the temperature of the neighboring components during rework. These issues, coupled with the limitations of rework equipment to handle lead-free reflow temperatures, make the task of reworking lead-free assemblies more challenging.
The SMTA membership is a network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies and related business operations.
Training Provider / Events Organizer / Association / Non-Profit
6600 City W Pkwy
Eden Prairie, MN USA
Phone: 952-920-7682
