Electronics Forum | Fri Oct 11 16:25:43 EDT 2013 | scdunlap
Also coplanarity can be poor on these parts so overprinting the paste (beyond the pad perimeter) can increase volume to insure robust solder joint.
Electronics Forum | Fri Jan 19 06:52:36 EST 2001 | pteerink
We have had the same problem with several boards, and the problem was with the land pattern design on the PCB, not the stencil. We found that the part tends to center itself on the one large pad, and if the two smaller pads are not the right distance
Electronics Forum | Thu Jan 18 19:16:42 EST 2001 | slowe
I am having problems with D-Packs shifting during reflow. Does anyone know of a good aperture design to solve this problem ? Possibly bow tie.
Electronics Forum | Mon Oct 27 09:54:40 EST 2003 | John
We're just now beginning to see 0402's in our designs. Can anyone make recommendations on stencil/aperture designs and print parameters? I'm seeing skips on a small number of joints on these parts. Thanks in advance, John
Electronics Forum | Fri Mar 24 14:06:07 EST 2006 | mdemos1
Hi. We are designing in a 128 pin LQFP that has a heat sink in the center of the package. The size of this is 7.44 by 7.55 mm. Can anyone recommend what pad size should be on the board for this? How about stencil aperture/pattern? Thanks, Mike.
Electronics Forum | Fri Mar 09 15:13:49 EST 2012 | davef
Care must be taken to not apply an excess of material, as the adhesive will flow under the device during placement and curing, and could cause a short. Printer setup: * Don't worry about stencil thickness. A wide range of stencil thicknesses (typic
Electronics Forum | Tue Mar 28 08:29:04 EST 2006 | davef
Pad design - Standard IPC 20 pitch QFP Thermal pad design - Layout the thermal pad 0mm to 0.15mm larger per side (0mm to 0.30mm larger overall) than the exposed die pad on the package. �Larger than�, as opposed to the same size, is preferred. Obvio
Electronics Forum | Tue Nov 11 09:19:17 EST 2008 | davef
By the way you asked the question, we assume that by "reballing" you mean bumping, we should be able to figure that out: * Volume of the ball = ( pi*d^�)/6 = [355/113] *0.6*0.6*0.6]/6 = 0.11mm^3 * Volume of solder required = 2*volume of ball = 2*0.11
Electronics Forum | Wed Oct 02 09:36:10 EDT 2002 | scottefiske
Dragon, Was recently responsible for No Clean Process/Material evaluation and implementation project. Shop was 100% Water soluble facility. Several Top Paste manufacturers were invited to participate. (3) were evaluated. All key variables were identi
Electronics Forum | Mon Sep 17 15:27:51 EDT 2001 | jschake
Challenges: The basic defects that impact assembly yield are bridging, satellite solder balls, and opens (i.e. tombstones / draw bridges). There are many variables with the stencil printing process that can impact these; several of them are listed
