Electronics Forum | Tue May 07 10:13:06 EDT 2019 | cyber_wolf
I have personally never seen a reflow profile change reduce voids. We have invited "experts" in to demonstrate this claim. They were unable to.
Electronics Forum | Mon May 27 04:40:21 EDT 2019 | SMTA-Rogers
Dear Steve, We already to do some DOE of reflow profile, but the optimized parameters are not help for the reduction of voids.
Electronics Forum | Mon May 27 04:46:11 EDT 2019 | SMTA-Rogers
Dear CW, Yes, we also tested many different brands and models of solder paste, under the same stencil design and reflow profile the condition of the voids will have great difference.
Electronics Forum | Mon May 27 04:28:30 EDT 2019 | SMTA-Rogers
Dear Steve, Thanks for your feedback in our experience add solder paste volume is better for the voids reduce of LED type components.
Electronics Forum | Sat Jun 01 04:27:37 EDT 2019 | gregoryyork
Increase paste volume and use ramp soak spike profiling. Reducing volume of paste often leads to entrapment. Good idea to know difference between voiding and dewetting due to contamination
Electronics Forum | Mon May 27 04:36:08 EDT 2019 | SMTA-Rogers
Dear Sr.Tech, We tried to adjust the soak time and TAL time of reflow profile, but it doesn’t seem to help much.
Electronics Forum | Mon May 06 06:22:39 EDT 2019 | SMTA-Rogers
Hello! Do you have a better stencil design to reduce the large area of solder joint voids? Or is there a suggested way to set the reflow profile? Or are there other process improvements to make the solder joint at the LED pad less than 10% per void?
Electronics Forum | Thu May 09 08:36:18 EDT 2019 | solderkingchris
Hi, You can work on improving stencil design, having the perfect profile and other process improvements but it may be the paste itself letting you down. We have put a lot of work into developing our solder pastes to significantly reduce voiding. Y
Electronics Forum | Tue May 07 10:36:38 EDT 2019 | slthomas
Probably just means you started out with an optimal profile. I suspect that not everyone does. ;) It seems like we did have some luck with profile adjustments in one instance with some QFN's with a large thermal pad. Like I said, though, the profi
Electronics Forum | Mon May 06 11:45:32 EDT 2019 | slthomas
There are quite a few papers out there on the subject. Just enter "SMT void reduction" into google or other search engine and take your pick. That said, slow ramp rates and paste volume reduction are a good place to start. Although I haven't tried i
A global industrial auction and valuation business with extensive experience in SMT, PCB Assembly & Manufacturing, Test, Semiconductor and other Electronics Machinery & Equipment.
Manufacturer / Equipment Dealer / Broker / Auctions
896 Main Street
Branford, CT USA
Phone: 203-488-7020
.png)
