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SMTnet Express, February 2, 2023, Subscribers: 24,661, Companies: 11,707, Users: 27,717

█ Electronics Manufacturing Technical Articles

Using Physics of Failure to Predict System Level Reliability for Avionic Electronics

Today's analyses of electronics reliability at the system level typically use a "black box approach", with relatively poor understanding of the behaviors and performances of such "black boxes" and how they physically and electrically interact (...) The incorporation of more rigorous and more informative approaches and techniques needs to better understand (...) Understanding the Physics of Failure (PoF) is imperative. It is a formalized and structured approach to Failure Analysis/Forensics Engineering that focuses on total learning and not only fixing a particular current problem (...) In this paper we will present an explanation of various physical models that could be deployed through this method, namely, wire bond failures; thermo-mechanical fatigue; and vibration.

Credit: DfR Solutions

A Review of Models for Time-to-Failure Due to Metallic Migration Mechanisms

Electrochemical migration (ECM) is defined as the growth of conductive metal filaments across a printed circuit board (PCB) in the presence of an electrolytic solution and a DC voltage bias. ECM, also known as dendritic growth, is a critical issue in the electronics industry because the intermittent failure behavior of ECM is a likely root-cause of the high occurrence of field failures identified as no trouble found (NTF)/could not duplicate (CND)

Credit: DfR Solutions

Causes and Costs of No Fault Found Events

A system level test, usually built-in test (BIT), determines that one or more subsystems are faulty. These subsystems sent to the depot or factory repair facility, called units under test (UUTs) often pass that test, an event we call No-Fault-Found (NFF). With more-and more electronics monitored by BIT, it is more likely that an intermittent glitch will trigger a call for a maintenance action resulting in NFF. NFFs are often confused with false alarm (FA), cannot duplicate (CNDs)or retest OK (RTOK) events. NFFs at the depot are caused by FAs, CNDs, RTOKs as well as a number of other complications. Attempting to repair NFF scan waste precious resources, compromise confidence in the product, create customer dissatisfaction, and the repair quality remains a mystery. The problem is compounded by previous work showing that most failure indications calling for repair action at the system level are invalid. NFFs can be caused by real failures or may be a result of system level false alarms. Understanding the cause of the problem may help us distinguish between units under test (UUTs) that we can repair and those that we cannot. In calculating the true cost of repair we must account for wasted effort in attempting to repair unrepairable UUTs.

This paper will shed some light on this trade-off. Finally, we will explore approaches for dealing with the NFF issue in a cost effective manner.

Credit: A.T.E. Solutions, Inc.

Reliability Testing For Microvias In Printed Wire Boards

Traditional single level microvia structures are generally considered the most robust type of interconnection within a printed wire board (PWB) substrate. The rapid implementation of HDI technology now commonly requires between 2, 3 or 4 levels of microvias sequentially processed into the product. Recent OEM funded reliability testing has confirmed that by increasing the levels (stack height) these structures are proving less reliable, when compared to their single or double level counterparts. Recently false positive results have been recorded on products tested with traditional thermal shock testing methodology (cycling between -40°C and 125°C, or 145°C). A number of companies are incurring product failures resulting in increased costs associated with replacing the circuit boards, components and added labour.

Credit: PWB Interconnect Solutions Inc.

Design Parameters Influening Reliability of CCGA Assembly; a Sensitivity Analysis

Area Array microelectronic packages with small pitch and large I/O counts are now widely used in microelectronics packaging. The impact of various package design and materials/process parameters on reliability has been studied through extensive literature review. Reliability of Ceramic Column Grid Array (CCGA) package assemblies has been evaluated using JPL thermal cycle test results (-50°/75°C, -55°/100°C, and -55°/125°C), as well as those reported by other investigators. A sensitivity analysis has been performed using the literature data to study the impact of design parameters and global/local stress conditions on assembly reliability. The applicability of various life-prediction models for CCGA design has been investigated by comparing model's predictions with the experimental thermal cycling data. Finite Element Method (FEM) analysis has been conducted to assess the state of the stress/strain in CCGA assembly under different thermal cycling, and to explain the different failure modes and locations observed in JPL test assemblies.

Credit: Jet Propulsion Laboratory

SEE Forum results for related keywords - physics failure -- 23

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█ Printed Circuit Board Assembly & PCB Design Forum

Batch washer aroma ? -- Why do batch washers smell like celery ?

Samsung Cp20CV component aligner problem -- Hello everyone ! I would like to ask for some help regarding the component aligner on the Samsung CP20CV machine (I just bought the machine and I am still learning to use it). I noticed that sometimes when I instruct the Head1 to pick up (any) nozzle the MMI show an error $8341. The error means that there is already a nozzle on the Head1. However this is not true, there is no nozzle on the Head1. I also noticed that there is a difference on the component aligner graph on "Aligner Image Check" windows. The Head1 aligner graph has looks different that the Head2 graph. I have attached the images of the graphs and photos of the aligner. As I mentioned I am really new in using this machine so I do not know if this differece in graphs is normal or not ? Also has any one had this or similar problem ? Any help would be a life saver ! Thanks ! Jurica

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█ SMT, PCB Electronics Assembly Manufacturing Industry News

North American EMS Industry Down 2.7 Percent in December

IPC releases EMS industry results for December 2022...

Association Connecting Electronics Industries (IPC)

IPC - NA EMS Sales Report

Counterfeit Electronics & Materials Symposium Program Announced and Registration Open

The SMTA is excited to announce the technical program for the Counterfeit Electronics & Materials Symposium. The symposium will be held 14—15 March 2023 at The Manufacturing Technology Centre in Ansty Park, Coventry, United Kingdom....

Surface Mount Technology Association (SMTA)

IPC's Highest Honor, the Raymond E. Pritchard Hall of Fame Award Presented to Industry Leaders Garry McGuire and Teresa Rowe

In recognition of their extraordinary contributions to IPC and the electronics manufacturing industry, Garry McGuire, NASA and Teresa Rowe, IPC, were both inducted into the IPC Raymond E. Pritchard Hall of Fame at IPC APEX EXPO 2023. IPC's most prestigious honor, the Hall of Fame Award is given to individuals who have provided exceptional service and advancement to IPC and the electronics industry....

Association Connecting Electronics Industries (IPC)

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