Mar 18, 2003
The Falcom JP7 is a single-board GPS receiver with 12 parallel channels.
The device is based on the SiRFstarII low-power chipset and consists of high-performance GPS core including acquisition accelerator, DGPS processor, multipath mitigation hardware and satellite tracking engine.
The JP7 delivers major advancements in GPS performance, accuracy, computing power and hardware integration.
The very compact size (25 x 25 x 3mm) together with the default trickle power mode (maximum 55mW, 800ms off, 200ms on) and superior TTFF acquisition rate (better than 45s) allows the creation of variety of very compact, low power, highly efficient OEM navigation, security and monitoring solutions.
The device is handled like an SMD component and can be soldered to the target motherboard of the embedded application using standard SMT technology.
This makes the JP7 concept perfect for high-volume cost-sensitive projects.
The Falcom JP7 can be used as direct hardware and software drop-in replacement for the TIM module from u-blox.
It is also hardware compatible with the new TIM-LP device.
Hardware and software designers are supported by a complete evaluation kit that contains all relevant reference design information.
».gif)
