Reliability of Stacked Microvia
Published: |
May 14, 2015 |
Author: |
Hardeep Heer, Ryan Wong |
Abstract: |
The Printed Circuit Board industry has seen a steady reduction in pitch from 1.0mm to 0.4mm; a segment of the industry is even using or considering a 0.25mm pitch. This has increased the use of stacked microvias in these designs. The process of stacking microvias has been practiced for several years in handheld devices; however, the devices generally do not operate in harsh conditions. Type 1 and Type 2 microvias have been tested over the years and have been found to be very reliable. We do not have enough test data for 3 and 4 stack microvias when placed on and off buried via. The main objective of this study was to understand the reliability of 3 and 4 stack microvias placed on and off a buried via.... |
|
|
|
Company Information:
More articles from Firan Technology Group »
- Jul 22, 2020 - Impact of Assembly Cycles on Copper Wrap Plating
- See all SMT / PCB technical articles from Firan Technology Group »
More SMT / PCB assembly technical articles »
- Apr 07, 2026 - Field Trials and Baking Studies of Ultra-Low Asparagine, Genome Edited (CRISPR/Cas9) and Mutant (TILLING) Wheat | SMTnet
- Apr 01, 2026 - Vehicles of change: two exceptional deposits of destroyed chariots or wagons from Late Iron Age Britain | SMTnet
- Mar 17, 2026 - Grey wolf optimization for color quantization | SMTnet
- Mar 17, 2026 - Large SurfaceāRupturing Earthquakes and a >12 kyr, Open Interseismic Interval on the Tintina Fault | SMTnet
- Mar 17, 2026 - Artificial intelligence (AI) applications for marketing: A literature-based study | SMTnet
- Browse Technical Library »
Reliability of Stacked Microvia article has been viewed 1163 times







