Technical Library: footprints (Page 1 of 2)

Dam and Fill Dispensing for Medical

Technical Library | 2023-08-16 18:02:27.0

One of our customers in the medical industry requested dam and fill application testing on a Kapton substrate. The material needed to be non-conductive for dispensing around electrical components, acting as structural support. Ultimately the product will be folded, therefore the footprint had to be small.

GPD Global

Optimizing BNC PCB Footprint Designs for Digital Video Equipment

Technical Library | 2010-11-06 02:44:38.0

An increasing number of video equipment is running at Gigabit rates today. They are interconnected through relatively large size coaxial BNC connectors. While these connectors are in general of good quality, their performance in the equipment depends on

Samtec, Inc.

Assessing the Effectiveness of I/O Stencil Aperture Modifications on BTC Void Reduction

Technical Library | 2018-09-26 20:33:26.0

Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.

AIM Solder

Voiding Control for QFN Assembly

Technical Library | 2011-04-07 14:50:29.0

Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry nowadays. This package offers a number of benefits including (1) small size, such as a near die-sized footprint, thin profile, and light weight; (2) easy PCB t

Indium Corporation

First Article – First Time

Technical Library | 2013-09-22 02:52:56.0

The PCB-assembly industry in constantly changing. Smaller footprints, new types of components and larger and more complex designs are accompanied by constant competitive pressures. As a result, electronics manufacturers need to continuously adapt their processes and make sure they exploit every opportunity for efficiency gains. This is the only way to improve quality and time to market and to increase profitability.

Proventus Technologies

Resource-efficient adhesion and potting technologies in electronics manufacturing

Technical Library | 2022-08-02 17:35:18.0

Saving resources in electronics manufacturing is not an end in itself. It is closely linked with reducing costs and gaining a competitive advantage. However, innovative adhesion and potting technologies in combination with highly functional adhesives and potting media make a significant contribution to the ideal union between economic performance and a reduced ecological footprint.

Scheugenpflug Inc.

Good Schematics Lead to GOOD LAYOUTS

Technical Library | 2015-04-08 11:10:47.0

An electronic schematic describes the electrical connectivity of a piece of equipment or an entire system. It is made up of symbols that represent individual components and contains electrical and mechanical information and their related connectivity, along with other important data. Information contained within the schematic is packaged into a printed circuit board (PCB) where the mechanical footprint is placed onto the board and connectivity information is graphically displayed. The more accurate the information contained in the schematic is and the clearer it is presented, the more it contributes to a robust printed circuit board.

Summit Interconnect

A Unified CAD-PLM Architecture for Improving Electronics Design Productivity through Automation, Collaboration, and Cloud Computing

Technical Library | 2012-01-26 20:28:34.0

In electronics design, Computer Aided Design (CAD) tools manage part data in a logical schematic view (a part symbol) and a physical PCB view (a part footprint). Yet, a part has a third view, which CAD tools ignore – its supply data (Manufacturer part num

UCLA - Networked & Embedded Systems Laboratory

An Alternative Solvent with Low Global Warming Potential

Technical Library | 2015-02-05 20:25:41.0

In the past 20 yrs the solvent industry has gone through a great deal of change. In the early 1990s, CFC-113 and 1,1,1-trichloroethane were the workhorses of the industry. The Montreal Protocol to phase-out substances that deplete the Earth's protective Ozone Layer was implemented in the mid 1990s. After phase-out of the CFC solvents, the solvent industry fragmented to a variety of cleaning solutions. The electronics industry was a large user of CFC solvents and many of these applications changed to aqueous based cleaners (...) But those alternatives are now facing various problems: e.g. aqueous based cleaners use a lot of energy, require long drying times, use equipment that requires frequent maintenance, and require a large footprint; no-clean fluxes leave flux residues; and trichloroethylene and n-propyl bromide have toxicity issues. In response to these serious issues newer solvents and blends are being introduced in the marketplace

Honeywell International

Pad Design and Process for Voiding Control at QFN Assembly

Technical Library | 2024-07-24 01:04:35.0

Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry recently. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints.

Indium Corporation

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