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News from Lattice Semiconductor


Lattice at Embedded World: New Products and Technologies for Embedded Design Applications

Feb 14, 2011

The LatticeECP3 family, is the third generation high value FPGA from Lattice Semiconductor, which offers the industry's lowest power consumption and price of any SERDES-capable FPGA device.

The LatticeECP3 family, is the third generation high value FPGA from Lattice Semiconductor, which offers the industry's lowest power consumption and price of any SERDES-capable FPGA device.

HILLSBORO, OR - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its plans for Embedded World 2011, which will take place March 1-3 in Nuremberg, Germany. Lattice will be exhibiting in Hall 9, Stand 180, and will be featuring several newly announced products, including the MachXO2™ PLD Family and Platform Manager™ devices, as well as its award-winning LatticeECP3™ FPGA family. There will be demonstrations of these products in embedded design development environments, and Lattice technical experts will be available to answer visitors' questions.

Exhibits, Displays and Demonstrations of Programmable Embedded Design Solutions that Reduce Costs, Power and Design Time

MachXO2 PLD Family

Among the new products that Lattice will display is its recently introduced MachXO2 family of Programmable Logic Devices (PLDs). The MachXO2 devices provide embedded designers an unprecedented mix of low cost, low power and high system integration. The MachXO2 family delivers a 3X increase in logic density, a 10X increase in embedded memory, more than a 100X reduction in static power and up to 30% lower cost compared to the prior generation MachXO PLD family. These devices are ideally suited for the most popular functions used in embedded system applications (telecom infrastructure, computing, high end industrial, high end medical) and embedded consumer applications (digital TVs, smart phones, GPS devices, mobile computing, digital cameras).

Platform Manager Family: "Product of the Year"

In designing highly integrated circuit boards that contain complex devices such as ASICs, Micros, and FPGAs, digital and power supply management is critical. Lattice recently introduced the programmable Platform Manager family, named “2010 Product of the Year” by Electronic Products Magazine, which called the Platform Manager family “a leap in the thought process when designing power and digital management functions.”

The Platform Manager family significantly simplifies board management design by integrating programmable analog and digital logic to support many common functions such as power management, digital housekeeping and glue logic. By integrating all of these support functions the Platform Manager device not only reduces design cost compared to traditional approaches, but also improves system reliability and provides a high degree of design flexibility that minimizes the risk of circuit board re-spins.

LatticeECP3 FPGA Family

Also on display will be the LatticeECP3 FPGA family, which offers the industry's lowest power consumption and price of any SERDES-capable FPGA device. The LatticeECP3 FPGA family offers multi-protocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, powerful DSP capabilities, high density on-chip memory and up to 149K LUTS, all with half the power consumption and half the price of competitive SERDES-capable FPGAs.

PCIe Demonstrations

The LatticeECP3 family will be demonstrated using a PCI Express Development Kit, which is a complete hardware/software development environment to help accelerate the evaluation of PCI Express technology, get to a known good starting point for a design and then easily transition to design exploration. In addition, Lattice and Trellisys Ltd will demonstrate a robust and cost-effective PCIe Bus Functional Model (BFM) for Lattice's PCI Express x1 and x4 IP Cores, which will enable users to reduce design complexity and shrink the time-to-market window for their PCI Express designs.

High Definition HDR Video Camera Demonstration

A LatticeECP3-based High definition (HD) Video Camera Development Kit with High Dynamic Range (HDR) will be demonstrated. The Kit is a production-ready HD video camera with complete Image Signal Processing (ISP) pipeline from Lattice partner Helion GmbH. Implemented in stream-processing mode through the LatticeECP3 FPGA, the end-to-end ISP pipeline, from sensor to HDMI/DVI output, needs no external frame buffer memory, is full HD 1080p60 capable and features the industry's fastest auto-exposure and 120+dB High Dynamic Range and Auto White Balance. With a production-ready reference design and free schematics and layout files, the kit is designed to jump-start video camera manufacturers' FPGA-based camera initiatives. The kit provides ease of programming via standard USB cable and support for legacy cable networks, with the ability to support Ethernet over coax up to a distance of 700 meters. The IP is scalable easily up to 16 megapixel sensors, making the kit virtually future proof.

Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit http://www.latticesemi.com

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