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STI Electronics’ Casey Cooper to Discuss SIR Test Protocols at the 2011 Pan Pacific Microelectronics Symposium

Dec 09, 2010

Casey Cooper, STI Electronics' Electrical Engineering/Microelectronics Lab Manager.

Casey Cooper, STI Electronics' Electrical Engineering/Microelectronics Lab Manager.

MADISON, AL - STI Electronics, Inc., a full service organization providing training, electronic and industrial distribution, consulting, laboratory analysis, prototyping, and small to medium volume specialized PCB assembly, announces that Casey Cooper, Electrical Engineering/Microelectronics Lab Manager, will present "Conformal Coating Evaluation for Use in Harsh Environments Utilizing a Modified SIR Test Protocol" at the upcoming Pan Pacific Microelectronics Symposium & Tabletop Exhibition, scheduled to take place January 18-20, 2011 at the Hapuna Beach Prince Hotel on the Big Island of Hawaii. The presentation will take place during Session THA2, titled "Materials Advances: Reliability," which is scheduled for Thursday, January 20, 2010 from 9-10:30 a.m.

High-reliability electronics pose a higher risk of failure when operating in harsh environments such as high-temperature and high-humidity. Add the possibility of ionic contaminants left on the substrate surface from the electronics manufacturing processes and the result is a situation set for failure. One common test standard used to evaluate the effects of assembly materials and manufacturing processes (i.e. residual materials) for hardware operating in hot, humid environments is the Surface Insulation Resistance (SIR) test. 

This paper will study a customized test protocol designed to environmentally stress screen conformal coatings for their ability to withstand moisture ingression and protect the conductors from moisture-related failures such as corrosion and dendritic growth formations. The analysis of data captured from continuous voltage monitoring (for dendritic growth/shorts) in addition to traditional SIR testing will provide the manufacturing engineer with the necessary data to evaluate and identify the optimal material set and process parameters to manufacture high-reliability electronics for operation in harsh environments.

Casey is involved with the development of Imbedded Component/Die Technology (IC/DT®) at STI and its implementation into military, aerospace and commercial applications. Mrs. Cooper has more than nine years of experience with microelectronics packaging beginning with her involvement at the Center for Advanced Vehicle Electronics (CAVE) as a co-op student while studying Electrical Engineering at Auburn University. She also served as an intern for the Microelectronics Technology group at Harris Corporation in Melbourne, FL, where she was involved with the redesign of a multichip module LTCC layout.

For more information about STI's Electronics, visit http://www.stielectronicsinc.com.

Since 1982, STI Electronics, Inc. (STI) has been the premier full service organization for training, consulting, laboratory analysis, prototyping, and small- to medium-volume PCB assembly in the electronics industry. STI also produces a complete line of solder training kits and training support products. Additionally, the company distributes products for the electronics and industrial markets. For more information, visit http://www.stielectronicsinc.com.

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