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SMTA Announces International Wafer-Level Packaging Conference (IWLPC) Call for Papers

Feb 01, 2010

Minneapolis, MN - The SMTA, in conjunction with Chip Scale Review magazine, is pleased to release the Call for Papers for the 7th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition (IWLPC) to be held October 11-14, 2010 at the Marriott Santa Clara Hotel in Santa Clara, CA. The IWLPC Technical Chair, Lee Smith of Amkor Technology, and the IWLPC Technical Committee would like to invite you to submit an abstract for this program on or before April 23, 2010.

The conference will include three tracks in 2010 with two days of papers covering:

  • Wafer Level Packaging

  • MEMS Packaging

  • 3-D Integration

This premier industry event explores leading-edge design, material, and process technologies focused on Wafer-Level Packaging applications. There will be special emphasis on the numerous device and end product applications (RF/wireless, sensors, mixed technology, optoelectronics) that demand wafer level packaging solutions for integration, cost, and performance requirements.

Visit http://www.iwlpc.com/call_for_papers.cfm to view the complete Call for Papers and to submit an abstract. For more information contact Melissa Serres at 952-920-7682 or melissa@smta.org.

The SMTA membership is an international network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies, including microsystems, emerging technologies, and related business operations.

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