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2009 International Wafer-Level Packaging Conference Dates and Location Announced

Dec 02, 2008

Minneapolis, MN � The SMTA and Chip Scale Review Magazine are pleased to announce the dates for the 2009 International Wafer-Level Packaging Conference. The 6th annual offering of the IWLPC will be held on October 27-30, 2009 at the Santa Clara Marriott in Santa Clara, California.

The IWLPC has been held at the Wyndham San Jose for the past three years and is moving to Santa Clara to accommodate the growing program. Attendees will benefit from an additional conference track and increased space for the tabletop exhibition.

�The move to the Santa Clara Marriott is exciting for the IWLPC. The program continues to expand and interest from the industry rises each year. The new facility will be able to accommodate the additional conference track and thus help us increase the value of the program,� said Ken Gilleo, General Chair of the IWLPC.

The IWLPC will have two days of half-day tutorials led by leading instructors in the industry, followed by two days containing three tracks of technical presentations on wafer-level packaging technologies, 3D and Advanced Packaging and a tabletop exhibition.

Visit http://www.iwlpc.com for more information on the 2009 program.

The IWLPC is coordinated by the SMTA and Chip Scale Review magazine.

The SMTA membership is an international network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies, including microsystems, emerging technologies, and related business operations.

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