We see a huge opportunity for us in the package and flex market. Historically, we approached this market with our traditional 16 head flying prober. Testing Flip Chip and CSP technology demands high accuracy and no witness marks. We knew to effectively meet the demands of package market, a new probe head design was essential. With the introduction of the S1, we can show a speed nearly double to the nearest competitor while achieving industry acceptable witness marking. The S1, with eight probes heads simultaneously testing package panels, is already warranting attention. We feel that the S1 will be especially suited for the package markets within Korea, Japan and Taiwan.
In an effort to reduce pre-mature failures of a PCB, we see many manufactures adding more stringent requirements to existing electrical test protocol. In 2008 we are cognizant of a growing market for ��Value Added Testing.�� The latter term refers to additional test methods that PCB manufactures can employ to increase user life of their product. One key example is utilizing Four Wire or Kelvin Based Testing. Kelvin measurement allows the user to measure resistance values well below 1 Ohm. In the Atg/LM prober a user can specify testing down to 1 mOhm resistance. The latter test will measure the true resistance of the trace by placing a shielded current and voltage source at each end of the network. One additional example of Value Added Testing is called Latent Defect Testing. A technique originally created by IBM, Latent Defect Testing uses Ohmic heating to measure voids, mouse bites or neck downs within a trace.
Under standard test protocol the latter flaws would go un-detected. These flaws could turn into pre-mature failures in the PCB�s final application. n summary, atg/LM will give our global customer additional test tools to make them more valuable to their end customer.