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Press Preview for IPC Apex 2017, San Diego Conference Center, Booth 3435 14th to 16th February 2017

Jan 04, 2017

JT 5705/FXT Multi-Function Tester.

JT 5705/FXT Multi-Function Tester.

Introduction to JTAG Maps.

Introduction to JTAG Maps.

No Boundaries for Boundary Scan

JTAG Technologies return to San Diego this year to premiere several new hardware products for PCB testing and In-System [Device] Programming and -to introduce their new collaborative product with Altium – JTAG Maps.

Introduction to JTAG Maps

A large number of today's electronic designs feature JTAG/boundary-scan components that provide valuable test resources during hardware debug, manufacturing test and even depot repair. JTAG Maps is a simple extension to the Altium Designer tool suite that allows the user/engineer to thoroughly assess the capabilities of the JTAG/boundary-scan resources on their design - before committing to layout.

Highlighting the schematics

Until now engineers could often spend hours highlighting the boundary-scan nets of a design manually to assess the fault coverage that boundary-scan testing could bring a specific design. Today the free JTAG Maps for Altium, application extension, does all this and more, freeing up valuable time, allowing a more thorough DfT and speeding time to market.

With or without boundary-scan models

Boundary-scan device models (BSDLs) are pivotal to any JTAG/boundary-scan process as they indicate precisely which pins can be controlled or observed by JTAG/boundary-scan. However BSDL models are not always available in a timely manner. To overcome this potential problem JTAG Maps for Altium includes an 'assume scan covered' feature enabling a view of potential boundary-scan coverage without a specific BSDL. This feature can also be used to indicate fault coverage to a connector (set to assume scan covered) or to highlight the differences in fault coverage between two equivalent parts, one with and one without built-in JTAG/boundary-scan.

Automatic chain detection

JTAG Maps for Altium will automatically detect the scan chain path (or paths) with no limits to the number of paths (aka TAPs) in the design. The nets associated with the TAPs will be highlighted separately from the 'testable' nets using different colors.

Import as well as export

While most users will want to simply use the quick coverage report that JTAG Maps for Altium can provide, it is still possible to import a more accurate picture.

After exporting a JTAG ProVision project, the data can be sent to your local JTAG Technologies office, Approved Application Provider, or approved JTAG representative for further analysis. A simple message file containing full fault-coverage information can then be read back into JTAG Maps for display/highlighting.

More Highlights from JTAG Technologies at San Diego:

JT 5705/FXT Multi-Function Tester

The latest product on display will be an example of JTAG’s ‘fixture embedded’ test technology - the JT 5705/FXT multi-function JTAG tester built into one the small linear series of cassette-based re-configurable fixtures of Everett Charles Technologies (ECT), a world-renowned name in PCB test fixtures and interface.

The JT 5705/FXT is a compact, single-board test system that supports analog measurement and stimulus, frequency measurements, digital I/O, boundary-scan testing and also in-system device programming. Within the fixture multiple JT 5705/FXT tester cards can be mounted on purpose built carriers featuring the ATE industry standard ‘Pylon’ connectors, making test system build a snap

Emulative Testing and Programming

New system CTPG-M to increase fault coverage and speed-up testing on designs featuring µProcessors and FPGAs - Building on their Emulative Test & Programming (ETP) technology, that offers access to the emulation modes of µprocessors or the internal IP bus of an FPGA, JTAG introduces an automatic generator for testing connectivity and functionality between a core and all kinds of memory devices and refers to it with CTPG-M. CTPG-M has been developed to overcome many of the issues associated with testing of memory clusters using conventional boundary-scan (IEEE Std 1149.1) techniques.

New - JTAG-powered PCB tester-programmer the JT 57xx/RMI ‘Combi-System’

A modular concept of a newly designed base-level 19” 1U rack-mount chassis assembly that can house up to four customer-specified modules offering various JTAG (IEEE 1149.x) controllers, digital IO and analog IO and other measurement features. The modules are either ½ rack or ¼ rack width and are available in different configurations. JTAG will present you the full module range at the show.


JTAG Technologies is a market leader and technology innovator of boundary-scan software and hardware products and services. The company was the first to bring to the market such important advances as automated test generation, automated fault coverage analysis, automated flash and PLD programming via boundary-scan, and visualized boundary-scan analysis. Its customers include world leaders in electronics design and manufacturing such as Ericsson, Flextronics, Honeywell, Medtronic, Motorola, Nokia, Philips, Raytheon, Rockwell-Collins, Samsung, and Sony. Its innovative boundary-scan products provide test preparation, test execution, test result analysis and in-system programming applications. With an installed base of over 8000 systems worldwide, JTAG Technologies serves the communications, medical electronics, avionics, defence, automotive, and consumer industries with offices throughout North America, Europe and Asia. JTAG Technologies headquarters are located in Eindhoven, The Netherlands. For more information please visit www.jtag.com

Feb 27, 2018 -

Preview for IPC Apex 2018 San Diego, booth # 3007 JTAG Visualizer Update Adds Features for Faster Debug Assess PCB assembly fault coverage and find board build errors quicker

Jan 16, 2018 -

Preview for IPC Apex 2018 San Diego, booth # 3007 JTAG Visualizer Update Adds Features for Faster Debug Assess PCB assembly fault coverage and find board build errors quicker

Nov 07, 2017 -

Preview for productronica 2017 JTAG Visualizer Update Adds Features for Faster Debug

Sep 10, 2017 -

JTAG Technologies’ Preview for IEEE Autotestcon 2017, Booth 721, Schaumburg, Illinois, September 14th-17t

Aug 26, 2017 -

Preview for JTAG Technologies for SMTA International - Schaumburg, Illinois Chicago, booth # 228, 19th to 20th September 2017

May 22, 2017 -

Preview for Jaarbeurs Utrecht, 30th May to 1st June 'Electronics and Applications' Show JTAG Technologies Booth # 7E018

Nov 09, 2016 -

Map your JTAG Test Access with Altium Designer

Sep 20, 2016 -

JTAG Technologies for SMTA Show Rosemont IL, USA, booth # 136

Sep 05, 2016 -

JTAG Technologies’ Preview for Autotestcon 2016 Booth # 826, Anaheim September 12-15,

Sep 01, 2016 -

Multi-function JTAG Board Tester fits into ECT (Xcerra) Fixtures

26 more news from JTAG Technologies B. V. »

May 22, 2018 -

Koh Young, the 3D Inspection Market Leader, Reports Strong Quarterly Results Again

May 22, 2018 -

Metcal Is Reinventing Hand Soldering – Learn More at the SMTA Upper Midwest Expo

May 22, 2018 -

Europlacer to Show Full Assembly Line Products & Solutions at SMT Nuremberg.

May 22, 2018 -

IPC Releases Additional Test Coupons for the IPC-2221B Gerber Coupon Generator Test Coupons provide structural integrity verification based on current printed board design technology

May 22, 2018 -

Specialized Coating Services Hosts Successful Open House for New Billerica Facility

May 22, 2018 -

Koh Young Continues to Strengthen its Support Network for the Americas

May 21, 2018 -

Naprotek, Inc. Installs Flexible New MXI System

May 21, 2018 -

Ersa Holds National Sales Meeting with Hands on Training

May 21, 2018 -

New Lightweight Cartridge Applicators from Techcon

May 21, 2018 -

KIC to Discuss Closing the Loop at SMT/Hybrid/Packaging

See electronics manufacturing industry news »

Press Preview for IPC Apex 2017, San Diego Conference Center, Booth 3435 14th to 16th February 2017 news release has been viewed 766 times

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