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‘Origins of Silicon Valley’ Is Keynote Topic of International Wafer-Level Packaging Conference (IWLPC)

Jun 20, 2013

 SMTA and Chip Scale Review magazine are pleased to announce the keynote presentation for the 10th Anniversary of the International Wafer-Level Packaging Conference, November 5-7, 2013 in San Jose, CA.  Paul Wesling will give an exciting and colorful history of electronics device technology development and innovation in his presentation, "The Origins of Silicon Valley: Why and How It Happened Here."

Paul’s presentation follows the history of electronics development that began in San Francisco and Palo Alto, moved down the Peninsula, and ended up in the Santa Clara Valley during and following World War II. Attendees will learn about some of the colorful characters -- Lee DeForest, Bill Eitel, Charles Litton, Fred Terman, David Packard, Bill Hewlett and others -- who came to define the worldwide electronics industries through their inventions and process development.

Paul Wesling has worked at GTE, Amdahl, Tandem Computers, Hewlett Packard and several start-ups, in R&D, design, and manufacturing technology. Assignments included bubble memory development, IC packaging, multi-chip modules, thermal management, reliability, and executive management, as well as developing advanced technology and professional skills courses for the technical staff. A Fellow of the IEEE, he received the IEEE Centennial Medal, the CPMT Distinguished Service award, and the IEEE's Third Millennium Medal, and served as the CPMT Society's vice president of publications for 22 years. Now retired, he is communications director for the IEEE's SF Bay Area Council and the editor of the Council's GRID Magazine. Paul earned his BS-EE and his MS-Materials Science, both from Stanford University. From his extensive career, Paul has had a clear view of the developments in Silicon Valley over the past 4 decades.

Now in its 10th year, IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging.

Visit http://www.iwlpc.com for more information. 

Contact Patti Hvidhyld at 952-920-7682 or patti@smta.org with questions.


The SMTA membership is an international network of professionals who build skills, share practical experience and develop solutions in electronic assembly technologies, including microsystems, emerging technologies, and related business operations.

Chip Scale Review, now in its 16th year, is the leading international magazine serving the semiconductor, IC and electronic device packaging market.

 

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