Analog FastSPICE Platform Full-Circuit PLL Verification

Published:

June 30, 2016

Author:

Mentor Graphics

Abstract:

When designing PLLs in nanometer CMOS, it is essential to validate the closed-loop PLL performance metrics with nanometer SPICE accuracy before going to silicon. Transistor-level, closed-loop PLL verification has been impractical due to traditional SPICE and RF simulator performance and capacity limitations. By using Analog FastSPICE, designers dont have to trade accuracy for performance.

Read this white paper to see how AFS:

  • Delivers closed-loop PLL transistor-level verification
  • Supports direct jitter measurements
  • Produces phase noise results correlating within 1-2dB of silicon

...

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Company Information:

A leader in software solutions for electroncs design, Mentor Graphics is the only EDA company with a total end-to-end solution for design though manufacturing.

Wilsonville, Oregon, USA

Consultant / Service Provider

  • Phone 800-592-2210
  • Fax 202 4186945

See Company Website »

Company Postings:

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