Electronics Manufacturing Training

Technical Articles From Peregrine Semiconductor

Read technical articles about electronics manufacturing added by Peregrine Semiconductor


2 technical articles added by Peregrine Semiconductor

Company Information:

Peregrine Semiconductor

A leading fabless provider of high-performance, radio frequency integrated circuits, or RFICs.

San Diego, California, USA

Manufacturer of Components

  • Phone 858-731-9400
  • Fax 858-731-9499

Peregrine Semiconductor website

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(2) technical library articles

NSOP Reduction for QFN RFIC Packages

Aug 31, 2017 | Mumtaz Y. Bora

Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields.

Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction...

Failure Modes in Wire bonded and Flip Chip Packages

Dec 11, 2014 | Mumtaz Y. Bora

The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...)

The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared...

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