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Technical Articles From i3 Electronics

Read technical articles about electronics manufacturing added by i3 Electronics


21 technical articles added by i3 Electronics

Company Information:

A world leader in high-performance PCB fabrication & assembly, semiconductor packaging, systems integration & test, advanced laboratory services and contract R&D.

Endicott, New York, USA

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  • Phone 866 820-4820
  • Fax 607 755-7000

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(3) products in the catalog

(21) technical library articles

(26) news releases

Printable Electronics: Towards Materials Development And Device Fabrication

Mar 13, 2023 | Rabindra N. Das, How T. Lin, John M. Lauffer and Voya R. Markovich

Purpose – There has been increasing interest in the development of printable electronics to meet the growing demand for low-cost, large-area, miniaturized, flexible and lightweight devices. The purpose of this paper is to discuss the electronic application of novel printable materials. Design/methodology/approach – The paper addresses the utilization of polymer nanocomposites as it relates to printable and flexible technology for electronic packaging. Printable technology such as screen-printing, ink-jet printing, and microcontact printing provides a fully additive, non-contacting deposition method that is suitable for flexible production....

Advanced Organic Substrate Technologies To Enable Extreme Electronics Miniaturization.

Aug 14, 2014 | Susan Bagen, Dave Alcoe, Kim Blackwell, Frank Egitto.

High reliability applications for high performance computing, military, medical and industrial applications are driving electronics packaging advancements toward increased functionality with decreasing degrees of size, weight and power (SWaP) The substrate technology selected for the electronics package is a key enabling technology towards achieving SWaP. Standard printed circuit boards (PWBs) utilize dielectric materials containing glass cloth, which can limit circuit density and performance, as well as inhibit the ability to achieve reliable assemblies with bare semiconductor die components. Ceramic substrates often used in lieu of PWBs for chip packaging have disadvantages of weight, marginal electrical performance and reliability as compared to organic technologies. Alternative materials including thin, particle-containing organic substrates, liquid crystal polymer (LCP) and microflex enable SWaP, while overcoming the limitations of PWBs and ceramic.

This paper will discuss the use of these alternative organic substrate materials to achieve extreme electronics miniaturization with outstanding electrical performance and high reliability. The effect of substrate type on chip-package interaction and resulting reliability will be discussed. Microflex assemblies to achieve extreme miniaturization and atypical form factors driven by implantable and in vivo medical applications are also shown....

Manufacturing Substrates with Embedded Passives

May 05, 2011 | R. N. Das, K. I. Papathomas J. M. Lauffer, S. Rosser, M. D. Poliks, V. R. Markovich

Passives account for a very large part of today’s electronic assemblies. This is particularly true for digital products such as cellular phones, camcorders, and computers. Market pressures for new products with more features, smaller size and lower cost v...

Nanofluids, Nanogels and Nanopastes for Electronic Packaging

Dec 22, 2010 | Rabindra N. Das, Varaprasad Calmidi, Mark D. Poliks and Voya R. Markovich

This paper discusses polymer based nanogels, nanofluids and nanopastes for thermal interface material (TIM) applications. Nanopaste and nanogel formulated using controlled-sized particles to fill small bond lines is highlighted....

Organic Optical Waveguide Fabrication in a Manufacturing Environment

Oct 28, 2010 | Benson Chan, How Lin, Chase Carver, Jianzhuang Huang, Jessie Berry

Optical waveguides based on organic materials have been fabricated in a laboratory environment but the scaling and manufacturing processes needed to produce these waveguides have been scant. The volume production of low loss organic waveguides in a conven...

PWB Manufacturing Variability Effects on High Speed SerDes Links: Statistical Insights from Thousands of 4-Port SParameter Measurements

Aug 05, 2010 | Bart O. McCoy, Robert Techentin, Benjamin Buhrow, Kevin Buchs, Dr. Barry K. Gilbert, Dr. Erik S. Daniel, How Lin

Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability estimates of SI me...

Resin Coated Copper Capacitive (RC3) Nanocomposites for System in a Package (SiP): Development of 3-8-3 structure

Oct 08, 2009 | Rabindra N. Das, Konstantinos I. Papathomas, Steven G. Rosser, Tim Antesberger, John M. Lauffer, Mark D. Poliks and Voya R. Markovich.

In the present study, we report novel ferroelectric-epoxy based polymer nanocomposites that have the potential to surpass conventional composites to produce thin film capacitors over large surface areas, having high capacitance density and low loss. Specifically, novel crack resistant and easy to handle Resin Coated Copper Capacitive (RC3) nanocomposites capable of providing bulk decoupling capacitance for a conventional power-power core, or for a three layer Voltage-Ground-Voltage type power core, is described....

Joule Heating Effects on the Current Carrying Capacity of an Organic Substrate for Flip-Chip Applications

Jul 22, 2009 | Varaprasad Calmidi, Irv Memis.

This paper deals with the thermal effects of joule heating in a high interconnect density, thin core, buildup, organic flip chip substrate. The 440 μm thick substrate consists of a 135 μm thick core with via density of about 200 μm. The typical feature sizes in the substrate are 50 micron diameter vias is the core/buildup layers and 12 micron thick metal planes. An experimental test vehicle is powered with current and the temperature rise was measured. A numerical model was used to simulate the temperature rise in the TV....

Reliability and Failure Mechanisms of Laminate Substrates in a Pb-free World

Apr 30, 2009 | Kevin Knadle.

This presentation surveys the most significant via and via-related laminate failure mechanisms from past to present using data from current induced thermal cycling (CITC) testing, failure analysis, and other sources. The relative life and failure modes of thru vias, buried vias, and microvias (stacked vs. non-stacked) are compared, along with the affect of structure, materials, and peak temperatures on the above. The origin of via-induced laminate failures such as "eyebrow cracks" and Pb free related internal delamination is also explored....

An Experimental and Computational Study of the Current Carrying Capacity of High Performance PWB Interconnections

Jan 01, 2009 | Michael J. Rowlands and Vara Calmidi, Endicott Interconnect Technologiesogies

Recent technology advancement has enabled enhancement in PWB electrical performance and wiring density. These innovations have taken the form of improved materials, novel PWB interconnect structures, and manufacturing technology. One such advancement is Z-axis conductive interconnect. The Z-interconnect technology involves building mini-substrates of 2 or 3 layers each, then assembling several mini-substrates together using conductive paste....

Printable Nanocomposites for Electronic Packaging

Jun 25, 2008 | Endicott Interconnect Technologies, Inc.

Printing technologies provide a simple solution to build electronic circuits on o low cost flexible substrates. Nanocomposites will play important role for developing advanced printable technology. Advanced printing is relatively new technology and need more characterization and optimization for practical applications. In the present paper, we examine the use of nanocomposites or materials in the area of printing technology....

Manufacture and Characterization of a Novel Flip-Chip Package Z-interconnect Stack-up with RF Structures

Feb 26, 2008 | Michael J. Rowlands, Rabindra N. Das

More and more chip packages need multi-GHz RF structures to meet their performance targets. The ideal chip package needs to combine RF features with Digital features for these applications. They drive low-loss, controlled impedance transmission lines, flexibility in assigned signal and power layers, and clearances of various shapes in power layers. Building these features in a chip package is difficult without making the stack-up very thick or compromising the reliability of the product. In the present paper, we have designed and built a flip-chip package test vehicle (TV) to make new RF structures, using Z-axis interconnection (Zinterconnect) building blocks....

Laser Micromachining of Nanocomposite-Based Flexible Embedded Capacitors

Nov 21, 2007 | Rabindra N. Das, Frank D. Egitto, John M. Lauffer and Voya R. Markovich.

This paper discusses laser micromachining of barium titanate (BaTiO3)-polymer nanocomposites and sol-gel thin films. In particular, recent developments on high capacitance, large area, and thin flexible embedded capacitors are highlighted....

Influence of Nanoparticles, Low Melting Point (LMP) Fillers, and Conducting Polymers on Electrical, Mechanical, and Reliability Performance of Micro-Filled Conducting Adhesives for Z-Axis Interconnections

Nov 01, 2007 | Rabindra N. Das, Konstantinos I. Papathomas, John M. Lauffer and Frank D. Egitto

This paper discusses micro-filled epoxy-based conducting adhesives modified with nanoparticles, conducting polymers, and low melting point (LMP) fillers for z-axis interconnections, especially as they relate to package level fabrication, integration,...

Electrical Performance of an Organic, Z-interconnect, Flip-Chip Substrate

Oct 25, 2007 | Michael J. Rowlands, Rabindra Das.

More and more substrate designs require signals paths that can handle multi-gigahertz frequencies [1-3]. The challenges for organic substrates, in meeting these electrical requirements, include using high-speed, low-loss materials, manufacturing precise structures and making a reliable finished product. A new substrate technology is presented that addresses these challenges....

Large Thin Organic PTFE Substrates for Multichip Applications

Jun 13, 2007 | Ron Nowak, Paul Hart, Dave Alcoe.

Very high performance computer applications have created a demand for large organic substrates capable of interconnecting one or a few ASIC semiconductor devices with packaged memory devices. The electrical advantages offered by the use of a thin PTFE composite substrate were coupled with intrinsic mechanical advantages to create very high performance applications. The application development required interactions of design, fabrication, and new manufacturing technology to obtain rapid prototype production and allow a successful ensuing manufacturing ramp....

Proof is in the PTH - Assuring Via Reliability from Chip Carriers to Thick Printed Wiring Boards

Jun 06, 2007 | Kevin T. Knadle, Virendra R. Jadhav.

Though today's microvias and high aspect plated through holes (PTH's) look nothing like the earliest through holes of 40 years ago, the PTH in its various forms remains the “weak link” and most critical element of printed wiring boards and laminate chip carriers (...) The paper outlines an approach to evaluating PTH reliability and quality that involves characterizing PTH life across a range of temperatures to reveal intricacies not seen by testing at a single delta-T, and certainly difficult to predict by modeling alone....

Real-Time Yield Monitoring Through ERP Systems

Apr 25, 2007 | P. Bhargava, J. Sturek, J. Peck, R. Murcko, K. Srihari

Globalization and increased competition requires an enterprise to focus on cost reduction, improved manufacturing processes and higher standards of quality. Effective yield management using Enterprise Resource Planning (ERP) systems is crucial for the success of any manufacturing organization. An ERP system provides the infrastructure for consolidating all business operations by integrating the information flow across functions, including production planning and control....

"High Reliability Products" What does it really take - A Test Perspective

Dec 04, 2006 | Subahu D. Desai

This paper will explore how test can be an integral part of manufacturing to assure High Reliability Products. We will discuss how test parameters and test techniques are effective in finding time zero vs. time dependent defects. Understanding of manufacturing processes in terms defect levels as well as defect types is very critical in defining test parameters, new test techniques and test alternatives. This ultimately can improve the yield, quality, and reliability. We will discuss the types of defects, time zero vs. time dependent defects, test parameters and effectiveness and new test techniques to find time dependent defects....

Organic Flip Chip Packages for Use in Military and Aerospace Applications

Nov 14, 2006 | David Alcoe, Kim Blackwell and Irving Memis, Endicott NY

Content: 1. Bridge from Commercial Reliability 2. Existing PBGA use in Aerospace & Military 3. Drivers: Plastic versus Ceramic Package Weight 4. Attributes of PTFE and Thin Core FC Packages 5. Flip Chip Package Reliability 6. Flip Chip Package ...

Testing To Eliminate Reliability Defects From Electronic Packages

Jun 29, 2006 | Irving Memis, Consultant, Endicott Interconnect Technologies

Electronic Packaging is a critical part of all electronic devices and can be a source of the reliability problems experienced by systems using those devices. In many cases, the packaging defects are intermittent in nature and difficult to detect. This paper describes a tester that has been used for 20 years on commercial products and has proven to be extremely effective in detecting these defects prior to component assembly....

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