Mar 04, 2013 | Anthony A. Primavera Ph.D.
Chip-scale (or chip-size) packages are rapidly becoming an important element in electronics due to their size, performance, and cost advantages [Hou, 1998]. The Chip Scale Package (CSP) is becoming a key semiconductor package type, particularly for consumer products. Due to their relatively smaller size, new challenges are presented in the rework and repair of CSPs. (...) The specific focus of this paper is the removal process for rework of CSPs and the site scavenging methods required to properly prepare the circuit board for a new component. Process factors such as the heating, fluxing and, atmosphere are discussed....
Publisher: Universal Instruments Corporation
Feb 28, 2013 | Keith Sweatman, Tetsuro Nishimura, Stuart D. McDonald, Kazuhiro Nogita
While it has long been known that the Cu6Sn5 intermetallic that plays a critical role in the reliability of solder joints made with tin-containing alloys on copper substrates exists in two different crystal forms over the temperature range to which electronics circuitry is exposed during assembly and service, it has only recently been recognized that the change from one form to the other has implications for solder joint reliability. (..) In this paper the authors report a study of the effect of cooling rates on Cu6Sn5 crystals. Cooling rates from 200°C ranged from 10°C/minute to 100°C/minute and the effect of isothermal ageing at intermediate temperatures was also studied. The extent of the phase transformation after each regime was determined using synchrotron X-ray diffraction. The findings have important implications for the manufacture of solder joints and their in-service performance... First published in the 2012 IPC APEX EXPO technical conference proceedings.......
Publisher: Nihon Superior Co., Ltd.
Nihon has been a leader in soldering and brazing since 1966. Nihon manufactures SMT solder joining materials e.g. lead-free solder (SN100C:Sn-Cu-Ni-Ge etc): solder paste, solder spheres, flux cored solder wire, solder bar, etc.
Feb 22, 2013 | LPKF
Productivity. Innovation. Time to market. Day to day, year over year, businesses are forced to make critical R.O.I.—related decisions that impact the future and the bottom line—some of them reactionary, some forecasted. For a growing number of electronics manufacturers, many of those decisions revolve around whether a function should be performed by an outside contractor or kept in-house. But for many companies in the RF/microwave industry, this decision is often concerned with continuing to employ an outside PCB fabricator for prototype PCBs, or to make a $10,000 to $100,000 investment in an inhouse, rapid PCB prototyping machine that may represent a key competitive advantage....
Publisher: LPKF Laser & Electronics
Feb 14, 2013 | Christopher Cain
Boundary-scan (1149.1) technology was originally developed to provide a far easier method to perform digital DC testing to detect intra-IC interconnect assembly faults, such as solder shorts and opens. Today's advanced IC technology now includes high-speed differential interfaces that include AC or DC coupling components loaded on the printed circuit assembly. Simple stuck-at-high/low test methods are not sufficient to detect all assembly fault conditions, which includes shorts, opens and missing components. Improved diagnostics requires detailed circuit analysis, predictive assembly fault simulation and more complex testing to isolate and accurately detect all possible assembly faults... First published in the 2012 IPC APEX EXPO technical conference proceedings...
Publisher: Agilent Technologies, Inc.
Feb 08, 2013 | Richard Lathrop
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed....
Feb 07, 2013 | John Meyer and Carlyn A. Smith, Ph.D.
Silicone contamination is known to have a negative impact on assembly processes such as soldering, adhesive bonding, coating, and wire bonding. In particular, silicone is known to cause de-wetting of materials from surfaces and can result in adhesive failures. There are many sources for silicone contamination with common sources being mold releases or lubricants on manufacturing tools, offgassing during cure of silicone paste adhesives, and residue from pressure sensitive tape. This effort addresses silicone contamination by quantifying adhesive effects under known silicone contaminations. The first step in this effort identified an FT-IR spectroscopic detection limit for surface silicone utilizing the area under the 1263 cm-1 (Si-CH3) absorbance peak as a function of concentration (µg/cm2). The next step was to pre-contaminate surfaces with known concentrations of silicone oil and assess the effects on surface wetting and adhesion. This information will be used to establish guidelines for silicone contamination in different manufacturing areas within Harris Corporation... First published in the 2012 IPC APEX EXPO technical conference proceedings....
Publisher: Harris Corporation
Jan 31, 2013 | Joe Thomas
There are three key industry trends that are driving the need for temperature-dependent warpage measurement: the trend toward finer-pitch devices, the emergence of lead-free processing, and changes in device form factors. Warpage measurement has become a key measurement for analysis; prevention and prediction of interconnect defects and has been employed in failure analysis labs and production sites worldwide. First published in the 2012 IPC APEX EXPO technical conference proceedings...
Publisher: ZN Technologies
Jan 30, 2013 | Pete Doyon, VP of Product Management
Many OEM’s require that individual wires and cables used in their products be clearly identified with a mark or label. For some, such as in the military and aerospace markets, wire and cable identification (or “wire ID”) is mandatory and the process is governed by stringent specifications, such as SAE AS50881 (formerly MIL5088L). For others, the decision to use wire ID is a voluntary one. This article will describe what type of information is typically identified on wire and cables, concepts for improved productivity, what types of systems are available and the pros and cons of each....
Publisher: Schleuniger, Inc.
Jan 29, 2013 | Pete Doyon, VP Product Management
Choosing a new wire Cutting and Stripping (C&S) machine can be like shopping for a new car. With so many choices, where does one start? A nice, little sports car might be fun to have, but how often will it just sit there because it can’t carry a car load of kids or some odd-sized goods from the local home improvement store? You just might be better off with a midsize SUV that does a pretty good job at doing everything you need it to do....
Publisher: Schleuniger, Inc.
Jan 24, 2013 | Roland Girouard
Being found in the search engines for a wide variety of terms directly related to my business would be my 1st priority......