Jul 02, 2014 | Jong-Myeong Park, Seung-Hyun Kim, Young-Bae Park - Andong National University, Myeong-Hyeok Jeong - NEPES Corporation.
Growth behaviors of intermetallic compounds (IMCs) and Kirkendall voids in Cu/Sn/Cu microbump were systematically investigated by an in-situ scanning electron microscope observation. Cu–Sn IMC total thickness increased linearly with the square root of the annealing time for 600 h at 150°C, which could be separated as first and second IMC growth steps. Our results showed that the growth behavior of the first void matched the growth behavior of second Cu6Sn5, and that the growth behavior of the second void matched that of the second Cu3Sn. It could be confirmed that double-layer Kirkendall voids growth kinetics were closely related to the Cu–Sn IMC growth mechanism in the Cu/Sn/Cu microbump, which could seriously deteriorate the mechanical and electrical reliabilities of the fine-pitch microbump systems...
Publisher: Nepes Corporation
Jun 26, 2014 | Steven Perng, Tae-Kyu Lee, and Cherif Guirguis - Cisco Systems, Inc., Edward S. Ibe - Zymet, Inc.
Edgebond adhesives have been widely used by the industry for improving the shock performance of area array packages. Most of the studies focus on the impact of material properties, such as coefficient of thermal expansion (CTE) and glass transition temperature (Tg), on reliability at room temperature. However, the operating temperature of a component on the printed circuit board bonded with edgebond adhesive can be close to or exceed Tg of the adhesive, where the material properties may be very different than at room temperature....
Publisher: Cisco Systems, Inc.
Jun 23, 2014 | John Maxwell, Director of Product Development, Johanson Dielectrics Inc.
It was unusual to see chip terminations change colors when tin lead solders were used but with the introduction of lead free reflow soldering and the corresponding increases in reflow temperatures terminations are now changing colors. Two conditions are present when reflow temperatures are increased for lead free solder alloys that leads to discoloration. Reflow temperatures are above the melting point of tin (Sn MP is 232oC). Air temperatures commonly used in forced convection reflow systems are high enough to both melt the tin plating on the termination allowing it to be pulled into the solder joint due to solder joint liquid solder surface tension leaving behind the exposed nickel barrier. Now those metal oxide colors will be visible due to high air temperatures during reflow....
Publisher: Johanson Dielectrics, Inc.
Jun 19, 2014 | Y.C. Liang, H.W. Lin, H.P. Chen, C. Chen, K.N. Tub, Y.S.Lai
For high-density electronic packaging,the application of flip-chip solder joints has been well received in the microelectronics industry. High-lead(Pb) solders such as Sn5Pb95 are presently granted immunity from the RoHS requirements for their use in high-end flip-chip devices, especially in military applications. In flip-chip technology for consumer electronic products, organic substrates have replaced ceramic substrates due to the demand for less weight and low cost. However, the liquidus temperatures of high-Pb solders are over 300°C which would damage organic substrates during reflow because of the low glass transition temperature. To overcome this difficulty, the composite solder approach was developed......
Publisher: National Chiao Tung University
Jun 12, 2014 | Arijit Roy
Occurrence of popcorn in IC packages while assembling them onto the PCB is a well known moisture sensitive reliability issues, especially for surface mount packages. Commonly reflow soldering simulation process is conducted to assess the impact of assembling IC package onto PCB. A strain gauge-based instrumentation is developed to investigate the popcorn effect in surface mount packages during reflow soldering process. The instrument is capable of providing real-time quantitative information of the occurrence popcorn phenomenon in IC packages. It is found that the popcorn occur temperatures between 218 to 241°C depending on moisture soak condition, but not at the peak temperature of the reflow process. The presence of popcorn and delamination are further confirmed by scanning acoustic tomography as a failure analysis....
A scholarly open access, peer-reviewed, interdisciplinary, monthly and fully refereed journal focusing on theories, methods and applications in Science, Engineering and Technology.
Riverside, Connecticut, United States
Jun 05, 2014 | Dr. Mike Bixenman, Debbie Carboni, Jason Chan
Stencil printing capability is becoming more important as the range of component sizes assembled on a single board increases. Coupled with increased component density, solder paste sticking to the aperture sidewalls and bottom of the stencil can cause insufficient solder paste deposits and solder bridging. Yield improvement requires increased focus on stencil technology, printer capability, solder paste functionality and understencil cleaning.
(...) The purpose of this research is to study the wipe sequence, wipe frequency and wipe solvent(s) and how these factors interact to provide solder paste printing yield improvement....
Publisher: Kyzen Corporation
Jun 02, 2014 | Dr. Mary Liu and Dr. Wusheng Yin
With the advancement of the electronic industry, package on package (POP) has become increasingly popular IC package for electronic devices, particularly POP TMV (Through Mold Vials) in mobile devices due to its benefits of miniaturization, design flexibility and cost efficiency. However, there are some issues that have been reported such as SIR drop due to small gap between top and bottom components, difficulty underfilling and rework due to stacked IC components and process yield issues. Some suppliers have reported using some methods such as dipping epoxy paste or epoxy flux to address these issues, but so far no customer has reported using these methods or materials in their mass production. In order to address these issues for POP TMV assembly, YINCAE has successfully developed and commercialized the first individual solder joint encapsulant adhesive for mass production for years....
Publisher: YINCAE Advanced Materials, LLC.
May 29, 2014 | B. Cheng, D. De Bruyker, C. Chua, K. Sahasrabuddhe, I. Shubin, J. E. Cunningham, Y. Luo, K. F. Böhringer, A. V. Krishnamoorthy, E, M. Chow
Electronics packaging based on stress-engineered spring interconnects has the potential to enable integrated IC testing, fine pitch, and compliance not readily available with other technologies. We describe new spring contacts which simultaneously achieve low resistance (< 100 mΩ) and high compliance (> 30 μm) in dense 2-D arrays (180 ~ 180-µm pitch). Mechanical characterization shows that individual springs operate at approximately 150-µN force. Electrical measurements and simulations imply that the interface contact resistance contribution to a single contact resistance is < 40 mΩ. A daisy-chain test die consisting of 2844 contacts is assembled into flip-chip packages with 100% yield. Thermocycle and humidity testing suggest that packages with or without underfill can have stable resistance values and no glitches through over 1000 thermocycles or 6000 h of humidity.
This paper suggests that integrated testing and packaging can be performed with the springs, enabling new capabilities for markets such as multichip modules....
IEEE is the world's largest professional association dedicated to advancing technological innovation and excellence for the benefit of humanity.
Piscataway, New Jersey, United States
May 22, 2014 | A. Boulouiz, M. El Moudane, M. Mekkaoui, A. Sabbar
In this paper, the general solution model of Chou has been used to predict the integral enthalpies of mixing of liquid In-Sn-Zn ternary alloys in five selected sections, xIn/xSn = 0.15/0.85, 0.34/0.66, 0.50/0.50, 0.67/0.33 and 0.85/0.15. The other traditional models such as Kohler, Muggianu, Toop and Hillert are also included in calculations. Comparison with literature data was done and showed reasonable agreement with Toop and Hillert asymmetric models....
Publisher: Université Mohammed V-Agdal
May 15, 2014 | S. Shanmugan*, D. Mutharasu, O. Zeng Yin
In the point of efficient heat removal from light emitting diode (LED) package to ambient, the surface of the heat sinks must be finished based on required condition. The surface finishing plays an important role in efficient heat dissipation. In our work, the top surface of heat sink was machined like two different shapes (slotted and 'W' shaped) and tested the thermal performance for 3W green LED. The total thermal resistance was high for 'W' shaped surface at 100 mA. Surface modification was not influenced much on the thermal resistance (Rth) value at higher operating current. Noticeable increase on junction temperature was observed for 'W' shaped surface at 100 mA than slotted surface. In optical properties, low lux values were recorded for ‘W’ shaped surface at all operating current. In addition, 'W' shaped surface showed low value in CRI than other two surfaces (plain and slotted). The observed CCT value was decreased as the measuring time increased. High value in CCT was observed for ‘W’ shaped surface at higher operating current (> 350mA). Slotted surface showed good performance on both thermal and optical properties of the given 3W green LED....
Publisher: Universiti Sains Malaysia