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Application Of Build-in Self Test In Functional Test Of DSL

First published in the 2012 IPC APEX EXPO technical conference proceedings.

by: YaJun Gu, Ye Qin, ZhiJun Wang, David Wei, Andrew Ho, Stephen Chen, Zhen (Jane) Feng Ph. D., Murad Kurwa; Flextronics International

BIST (build-in self test ) is the technique of designing additional hardware and software features into integrated circuits to allow them to perform self-testing, i.e., testing of their own operation (functionally, parametrically, or both) using their own circuits, thereby reducing dependence on an external automated test equipment (ATE). BIST is a Design-for-Testability (DFT) technique, because it makes the electrical testing of a chip easier, faster, more efficient, and less costly. The concept of BIST is applicable to just about any kind of circuit, so its implementation can vary as widely as the product diversity that it caters to. As an example, a common BIST approach for DRAM's includes the incorporation onto the chip of additional circuits for pattern generation, timing, mode selection, and go-/no-go diagnostic tests.

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