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Yield levels

Mike Proffitt

#20738

Yield levels | 17 July, 2002

I am working to improve the yield on a SMT line and am trying to find out a benchmark figure, anyone who could guide me to the expected yield for soldering related issues on a board containing approximatly 4000 joints I would be very greatfull.

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Mark S.

#20747

Yield levels | 18 July, 2002

How do you capture the workmanship details on a "per joint" basis?

I have recently implimented first pass yield in SMT but it is based on the whole part and not the number of joints. And yield is calculated by PCB failure rate..a PCB with a solder bridge on U6 (say SO8) counts as a failed unit..since this is how our final test dept. would capture the failure.

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#20749

Yield levels | 18 July, 2002

Mike,

When we measure solder inspection yield by dividing the number of defective joints on a CCA by the total number of joints on the PWB. A defective joint is classified only once. That is we don't count multiple defects on the same joint. Our operators count these on the documents which follow the units through the touch up operation. This judgement of course can be objective at times depending on the type of products (i.e. consumer, commercial, and military). On the average we touch up about 6 - 12% of all solder joints. We use this figure to bid new work. So far it has been a pretty good barometer. However, this may be different for you. Make sure you take into account the complexity of the components you use. We use plenty of fine pitch QFP, BGA, and uBGA.

Good Luck, Gregster

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#20767

Yield levels | 18 July, 2002

Not sure if you're trying to improve your defect rate (we use dpmo) or your test yield.

The question is what do you do if you're happy with your dpmo levels but not some of your first pass yield numbers because certain boards have more parts. Inspect more? Inspect "better"? Still working on that one.

As far as a benchmark figure for your board, we don't know if you have 2000 0805's, 2000 0201's, 17 qfp 240's, etc.

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#20769

Yield levels | 18 July, 2002

"On the average we touch up about 6 - 12% of all solder joints."

Do you mean at least one joint on 6-12% of all your boards, maybe? Sorry, I can be dense....

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#20771

Yield levels | 18 July, 2002

Steve,

We are touching up 6 - 12% of all solder joints processed. We consider the solder joint to be the focal point of the SMT process. Therefore our metric is based on it. For example in a given month we...

1. Assembled 25pcs of 'A' (IPC-A-610/J-STD-001-Class 3 design) CCA which has 4000 solder joints. 2. Assembled 50pcs of 'B' (IPC-A-610/J-STD-001-Class 2 design)CCA which has 2500 solder joints. 3. Assembled 250pcs of 'C' (IPC-A-610/J-STD-001-Class 1 design)CCA which has 1500 solder joints.

Total solder joints attempted is 4000+2500+1500=8000. Defective joints range from 6 - 12% depending of Classification (1,2, and 3). So we might touch up as little as 480 (6% of 8000) joints or as much as 960 (12% of 8000) joints.

I've tried dpmo and I'm not in favor of it. It can get too complicated when you start spelling out all the infinite opportunities. Some of which are so remote it makes the numbers look much better than they really are. Another factor is supporting the process. It probably would take a full time person to manage a database with all those opportunities. For me the PWB flash data is readily available through Gerber data conversion. Database maintenance is minimal. At the end of the day a defective joint is a defective joint no matter how many different ways a defect can be counted. Just my humble opinion...

Gregster

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#20772

Yield levels | 18 July, 2002

Greg,

So you mean that on a Class II board with 6000 connections (in our case, the board has about 1800 parts) you would average somewhere in the neighborhood of 540 connections touched up? My gawd, man, what are you building? We'd have to hire about 20 more people! I'm not saying it isn't justified, just blown away with the volume of work. We'd be dead.

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dragonslayr

#20777

Yield levels | 18 July, 2002

I suggest following the standards developed by IPC for DPMO (go to IPC. org for more info) Create your own benchmark, within your own environment, for the specific PCA, then do trend analysis, 6 sigma improvements, etc.

For a rule of thumb benchmark, a commercially available benchmark report can be purchased at ww.ceeris.com/DPMO.htm. This is rather pricey, may not reflect your particular situation. But it will help you put a stake in the ground to then measure from or to. One caution one the Ceeris report- they did their study before the IPC DPMO standard was released. Ceeris prevailing logic at that time somewhat summarized defect categories and I feel can be misleading as to true and actual results. I've had an e-mail exhange with the Ceeris CEO and he conceded that any future studies would be modeled after the IPC standard but he was not willing to reformulate his report for the past study.

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#20778

Yield levels | 18 July, 2002

Steve,

Seriously we really do that much. Don't know much about your stuff but our designs typically have as much as five 144 pin QFPs on each CCA. Boards are small and double sided with BGA and uBGA. We build some high reliability space stuff and we're a low volume high mix facility. Most of our stuff is Class 3. We're doing it with four people and two are part time. Wow I never thought 6-12% was that bad. What are you running at? Maybe I need to find a new job?

Gregster

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