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Tenting via(s) under BGA & CSP?



Tenting via(s) under BGA & CSP? | 11 April, 2002

We are using 1mm pitch BGAs with a great quantity of via(s) under the component. Very shortly we will be placing CSPs with .65mm pitch. Our via(s) are solder masked, however we generally have a percentage of them that the masking is thin enough that the via(s) are open, or has a substantial indentation in the via aperture. My concerns are, if a PCB is mis printed and needs to be cleaned that not all of the paste can be washed from the via opening or depression in the coating, then after reprint, and assembly, during reflow that paste in the via will emerge. If the coating on the via is thin enough, then the sharp corner between the via and eyelet can be exposed causing a bridge between it and an adjacent conductor. Also the same scenario can happen during rework. I have been unable to find an IPC standard concerning this issue. As we move to the .65 Pitch components this becomes an even greater concern. Dose anyone have any information on this?

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Tenting via(s) under BGA & CSP? | 12 April, 2002

First, splitting hairs on parlance. * Conformal Coating. A thin electrically nonconductive protective coating that conforms to the configuration of the covered assembly to provide environmental and mechanical protection. * Solder Mask. Coating material used to mask or protect selected areas of a pattern from the action of an etchant, solder, or plating.

You are probably talking to us about the solder mask that the fabricator puts on the board prior to assembly. Usually the assembler applies conformal coating after bonding the parts to the board.

Next, in ratcheting this down a little further, the principle types of solder mask are: * Solder Mask, Dry Film. A photo-imageable dry film mask allowing a minimum 0.003 to 0.005 inch clearance on each side of the pad. * Solder Mask, Liquid Photo-Imageable (LPI). LPI is the standard mask for SMT applications. It requires a clearance of 0.001 to 0.0015 inch on each side of the pad. This is very attractive for fine pitch applications, because it is a thin coating. * Solder Mask, Wet Film. A screenable solder mask. Wet film works well on PTH and sparsely populated SMT printed circuit boards.

Specifically, you probably are talking to us about LPI solder mask. Probably, it�s green colored. And it�s made by somebody, er other.

Now, on to you point, your concern about poor via coverage by your LPI solder mask is reasonable. Commonly, people have their board fabricator to additionally process their boards to cover the via properly by either: * Tenting via with another material, such as a wet film solder mask. * Filling via with plugging epoxy.

We�ve talked about plugging and tenting before on SMTnet. Search the fine Archives.

Your board fabricator can lay this out with costs and all that. Don�t let those penny-pinching morons talk you out of fixing this. When you�re building a high-end board like this saving a dime is false economy.

On a different tack, it�s nice they can do this, but these are not proper solutions to the situation: * Obviously cleaning raw paste with a common aqueous board cleaner is cookoo. [Taking this a bit far a field, an aqueous cleaner supplier mentioned in the fine SMTnet Archives suppliers a MacGyver cleaner that does both board and screens.] * Some stencil cleaner folk like to ruminate about the ability of their equipment to clean �mis-prints�. Search the fine SMTnet Archives for background. It�s nice they can do this, but �

Finally, consider redesigning the board to use blind via in the areas where you anticipate problems.

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Tenting via(s) under BGA & CSP? | 22 April, 2002

Depending on the volume of boards you are manufacturing, the most cost effective solution would be to epoxy plug the vias prior to LPI soldermask application. The technique is common practice and most suppliers can provide it will little or no cost adder.The hole is filled or nearly, with epoxy which will prevent your mask from thinning so much due to the mask trying to fill the hole.

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