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Voiding in uBGA's w/blind uvia's in pads

#18213

Voiding in uBGA's w/blind uvia's in pads | 20 November, 2001

We recently experienced a problem w/voids (up to 65%) in uBGA solder joints. The only joints that have the problem correlated to pads which had blind 0.006" via's in them. The via's only extend down 2 layers, of the 18. 21 BGA's on the PCB, only experiencing voiding where uVia's are present. Problem seen on 30% of PCB's. PCB's fabricated 2 weeks prior to production. PCB is 2.3mm thick. Plating is Au over Ni. Solder paste is WS 62/36/2. Profile has time over liquidous @ 65sec. Tried "filling" the uVia w/solder prior to SMT, w/o effect. Removed one of the uBGA's, cleaned-up pad, (again filling uVia), place new uBGA using paste gel, same problem w/voiding. Any ideas would be greatly appreciated.

Tony S.

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#18217

Voiding in uBGA's w/blind uvia's in pads | 20 November, 2001

Very coo!!!

[You have done an outstanding job of describing your situation.]

I guess the via are connected to a BIG chunk of copper that affects your profile on that pad / ball. At the same time, run a profile each on a: * Void pad * Nonvoid pad

Please post, er email me, the numbers just for yucks.

On the remove / clean-up / place new uBGA, what was your reflow process?

Ranting: You should kneecap the putz that designed this board. Putting a via in a pad is very bad practice and the sign of someone lacking the discipline to do their job correctly. Further, allowing via in pad indicates a bankrupt DFM process.

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#18224

Voiding in uBGA's w/blind uvia's in pads | 21 November, 2001

Hello, Sometimes you have no choice other than putting uvias in ubga's-pads. I know examples of high-end mass production of products with ubgas having voids. (no problems, but always voids visable in x-ray) I also performed a DOE a while ago to avoid voids in flat bigger components. Conclusion: slowdown your rampup in the temp-profile helps somewhat.

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Glenn Robertson

#18230

Voiding in uBGA's w/blind uvia's in pads | 21 November, 2001

Tony,

What you are seeing can occasionally be caused by gaps in the plating of the blind vias. If they are not "airtight" you can get moisture coming from the laminate that shows up as voids in the solder balls. You might check on the board supplier's process for plating those blind vias.

Glenn Robertson

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#18235

Voiding in uBGA's w/blind uvia's in pads | 22 November, 2001

Thanks for the comments & suggestions. Here's some info garnered from a telecon w/the PCB Fab house: -the blind via's extend from layer 2-17...this was a revelation. The info from our customer was that the via's only extended down 2 layers. Did I mention the PCB was 2.3mm thick?!!!! -the epoxy fill used in the via is non-conductive; this type of fill doesn't bond to the via walls as well as a conductive fill would. -there can be a meniscus up to .003" in the fill. Fab house suggests this might starve solder joints. -Fab house grudgingly accepted that out-gassing might be the problem. -the Fab house has 2 PCB's from this batch that they are shipping to us. We will wash one a few times, then process it, placing a few BGA's. The other PCB we'll bake prior to processing. Hopefully this experiment will help to prove the out-gassing theory.

I'll keep you posted.

Tony

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Glenn Robertson

#18249

Voiding in uBGA's w/blind uvia's in pads | 24 November, 2001

Tony,

I'm not sure if even baking will stop the voids if you have gaps in the plating. It probably doesn't take much moisture or even trapped air. I'm not speaking from a lot of direct experience here, so please run the tests and let us know what you find. Ask the supplier for cross sections that document their plating results. Not just a few - you need those guys to document for you the capability of their process. Also, what's the L/D of that plated via that's going about 16 layers? If L/D is too high there's no way to plate reliably. And why do they even think about using a non-conductive filler for the vias? Finally, how does a slight (possible) concavity on the fill even get into the discussion?

Glenn Robertson

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#18259

Voiding in uBGA's w/blind uvia's in pads | 26 November, 2001

I agree. Voids in plating are bad news and baking will not change that.

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#18266

Voiding in uBGA's w/blind uvia's in pads | 26 November, 2001

Which ramp is this? * Ramp to preheat? * Preheat? * Ramp to spike?

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#23092

Voiding in uBGA's w/blind uvia's in pads | 21 January, 2003

Sorry I didn't close this one off last year... We had some failure analysis done on these PCB's ( 3D x-ray,microsectioning,SEM) and the results definitively proved that there was some contamination @ the base of the uvia's that had the voiding. It appeared that the problem was with the PCB Fab house's cleaning process, pre-plating. The PCB house adjusted their processes...problem gone.

Tony

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Jerry Magera

#24393

Voiding in uBGA's w/blind uvia's in pads | 2 May, 2003

Via in pad is the most efficient use of space. Blind via seems to be blamed for this. Cross-sections (send me some) will probably show a void still existing in the via or spherical voids aligned near the component pad side. One can estimate the volume of volatiles (assuming bone dry air) creating at soldering temperature. A 5 mil diameter cylinder (simple approximation of a blind) will produce a 5 mil diameter void sphere, yet I bet the void in the via and voids near the component pad add up to greater volume (ignored water vapor). Cross-section of pad design (solder mask designed or non-solder mask define for board side and component side), any other volatile material or trapped air pockets besides the via cause this. Consider the case were the solder void stays in the blind via, so what, the joint reliability actually increases (check Motorola data).

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mk

#24406

Voiding in uBGA's w/blind uvia's in pads | 5 May, 2003

We have had good luck with via in pads using solid solder deposition. Please contact me off line or provide a number I can call.

Thanks

Matt Kehoe m.j.kehoe@att.net

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