| A customer told me that pad geometry was to be different depending on soldering process. | | I think this is untrue. What is stated in the IPC - SM -782 standards is that parts should be placed to elimanate a trailing edge. This however should not effect pad geomerty | | Am I wrong on this? | | Thanks, | | J.J. | JJ: First, about IPC-SM-782, that stuff is a consensus document. It's a "Hey this works for a bunch of people, maybe it'll work for you" type document. It's a guideline, not like an A-610 or J-001 "thou shall make it like this or I'll rip your face off" type document.
Second, on process oriented pad geometries:
1 Certainly, SMTnet has had its share of droning conversations arguing the merit of different second-side scavenger pad configurations for wave soldering SO parts. 2 And there have been flitting references on SMTnet to using savenger pads and different component orientations, when wave soldering PLCCs. 3 We try to get people to use pads shaped for wave soldering of chip components. Do they listen? No. Do we solder the boards with pads like they like, and not ike what we like? Yes. Do the boards look nice? Yes. Is everyone happy? Yes. Well, maybe not everyone. Has anyone ever listened to us? Yes. Were they happy? By the time they saw the boards, they either had forgotten about the pads or argued that it was their idea. Will we keep trying to get folks to use pads like we like? Yes. Do you need to get in a state about these pads? Probably not?