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Lo Behold Voids!!!!

Parvez

#11390

Lo Behold Voids!!!! | 20 May, 1999

hi everybody, We've been doing some studies on assembly of CSPs. We assembled these packages on micrivia-in-pad patterns. These are 15/13.5/11 mil pads with 6 mil design microvia, using photo/laser/plasma tech. We are seeing voids, as big as the microvia, and they sit exactly at the via opening. The process we use is pretty robust, using nitrogen for reflow and the problem is seen for both solder and flux. The reliability data is still not out,but we expect the voids to make a diffrence. Would appreciate some inputs on why/how? and what to do/what not to do? THanks in anticipation

Parvez M.S. Patel Graduate Research Associate, SUNY - Binghamton, New York. Ph:607 779 7215(O) Fax:607 779 4646

**Equilibrium is death. Seek persistent non equilibrium*****

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#11391

Re: Lo Behold Voids!!!! | 20 May, 1999

| hi everybody, | We've been doing some studies on assembly of CSPs. We assembled these packages on micrivia-in-pad patterns. These are 15/13.5/11 mil pads with 6 mil design microvia, using photo/laser/plasma tech. We are seeing voids, as big as the microvia, and they sit exactly at the via opening. The process we use is pretty robust, using nitrogen for reflow and the problem is seen for both | solder and flux. The reliability data is still not out,but we expect the voids to make a diffrence. | Would appreciate some inputs on why/how? and what to do/what not to do? | THanks in anticipation | | Parvez M.S. Patel | Graduate Research Associate, | SUNY - Binghamton, New York. | Ph:607 779 7215(O) | Fax:607 779 4646 | | **Equilibrium is death. Seek persistent non equilibrium***** | Pavez: So you have a void that is either:

1 Entrapped air because you:

1a Printed paste over a small hole in the pad 1b Trapped air between the paste and the pad 1c Gently placed a component on the pad 1d Melted the paste 1e Complained that the air trapped under the paste doesn�t go away.

OR

2 Entrapped flux because 2a Your profile is not setup to burn-off the flux. 2b Complained that the trapped flux doesn�t go away.

OR

3 Have poor solderability at the edges of the microvia because solder protectant is thinner there and corrosion developed

I could use a bit of equilibrium. Good luck.

Dave F

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Parvez

#11392

Re: Lo Behold Voids!!!! | 21 May, 1999

Dave, i tried reflowing bare boards with only solder printed on em and no component placed. we still got voids as same as when components were placed. so atleast one of that theories(voids due to component/component placement)could be considered to be out. I checked the profile and found that the soak was at abt 165-170 for 130-140 secs....i am trying to get the temp down and the soak time high...lets see if that works..

Thanks for the help Parvez

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#11393

Re: Lo Behold Voids!!!! | 21 May, 1999

| Dave, | i tried reflowing bare boards with only solder printed on em and no component placed. we still got voids as same as when components were placed. so atleast one of that theories(voids due to component/component placement)could be considered to be out. | I checked the profile and found that the soak was at abt 165-170 for 130-140 secs....i am trying to get the temp down and the soak time high...lets see if that works.. | | Thanks for the help | Parvez | Parvez (sorry about misspelling your name in a earlier post):

When rejiggering your profile:

1 Reflow time (temperature) is (are) very significant in void formation. Soak time is not a factor. 2 Increasing reflow temperature increases voiding. Temperature influences void formation 8.4X times greater than reflow time 3 Increasing reflow time decreases voiding 4 Small voids near the base (top) of the ball, increase reflow time (60 -> 100 sec) and decrease reflow temp to 205C.

Call Tony Primavera over at that manufactuing equipment company just down the street from you. He's a wizard on voiding in BGAs.

TTYL

Dave F

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#11394

Re: Lo Behold Voids!!!! | 21 May, 1999

| Dave, | i tried reflowing bare boards with only solder printed on em and no component placed. we still got voids as same as when components were placed. so atleast one of that theories(voids due to component/component placement)could be considered to be out. | I checked the profile and found that the soak was at abt 165-170 for 130-140 secs....i am trying to get the temp down and the soak time high...lets see if that works.. | | Thanks for the help | Parvez | Hey Parvez, wait a minute, already!!! Are your telling me that you get voids with just board and solder paste? If so, all three of the original hypothesis still hold:

1 Air entrapment under the solder paste 2 Lousey profile 3 Contaminated pads

What's in these voids? What do a section look like? What's the distribution of these voided pads? (Are they on every pad? Are they on the pads with the microvias? Or somewhere else?)

Dave F

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Parvez

#11395

Re: Lo Behold Voids!!!! | 21 May, 1999

hey dave... Abra Ca Babra ...Tony Primavera is my boss here....:)

The voids are circular in shape..perfect ones...and they are seen at about 90 % of the joints with vias, and also some at ones with no vias.

I am trying to play with the profile...lets see...

Keep in touch

Parvez

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Roque

#17768

Lo Behold Voids!!!! | 3 October, 2001

hello every body !!

We are assembling a new product with some kind of components like (soic)but this component has a metalic surface under the package that works like pin,is a ground terminal,and in the PCB you can see a pad, among the other pads,so you have to print paste on it ,so when you place the component and you reflow the board after you have voids seen in x-ray machine....the soak time of my profile is 60 sec, the dwell time is 45 sec as avg, What can i do to eliminate this defect??? 'cause if you have a void on solder joint you are decreasing the contact area of that component so you're gonna have troubles with its component function on testers.

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#17772

Lo Behold Voids!!!! | 3 October, 2001

Your component is probably EPTSSOP [Exposed Pad Thin Shrink Small Outline Package]. We had a thread on EPTSSOP a couple of months ago. [Check the fine SMTnet Archives for background.]

You�re correct that voids in the solder on the exposed pad [read ... heat sink] are not good. You probably should stop doing that. We do not check our EPTSSOP for voiding.

If I were a guessing person, I�d guess yer a NC fluxer. I�d guess that what yer seeing is similar to the voiding that some people see in BGA balls with NC fluxes. [See, that poor flux stuff gets trapped and just has no place to go. It can�t get out. It�s wedged in betwixt, struggling against the overwhelming confines of the solder particles, the pad, and the package. Try as it may, it just cannot break free and ends-up doomed to shuffle through its existence as a void. Yano, the only person that can help this poor little guy [sniff] is you, Roque.] I�d guess that big [7 thou] voids are worse than small voids. I�d guess that fewer voids are better than lots [10% of pad area / volume] of voids. I want to guess that voids at the package interface or at the pad are worse that voids located other places, but then again I�d guess there isn�t much difference. Guessing at something to try: * Check the fine SMTnet Archives for solutions to BGA voiding. Do whatever they say. * Change your reflow profile: decreasing [certainly not increasing] your soak time, bumping your time over liquidous to 100 sec, and decreasing [certainly not increasing] your peak temperature. * Decrease the aperture of the exposed pad to 85%.

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