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Printed Circuit Board Assembly & PCB Design Forum

SMT electronics assembly manufacturing forum.


OSP vs HASL

zam_bri

#6565

OSP vs HASL | 12 May, 2001

The product I'm running currently consist a mix of 20 mil pitch QFP, 50 mil pitch, 0402, BGA and variable size of connectors from small to big, on OSP finished PCB. Running intrusive reflow with a mix packages is a real headache, esplly when you have to hv step up at certain location, where the clearance to the neighbouring component ( 0402) is very limited. If I were to have a good DFM, what is the best clearance for the step up i.e. 12 mil from 6 mil thickness. FYI, the metal squeegee is purposely cut, to ensure flexibility at printing.

2ndly, taking into consideration that the good solder wetting of OSP coated boards occurs only where the flux comes into contact with the pads, I've modified the stencil opening for fine pitch i.e maintaining the length 1:1 and reduce the width by 2 - 4 mil from the pad size ( to prevent shorts). This is done with the intention of preventing the reflowed board from having an exposed copper ( small portion at the end/edge of the copper pad )but I failed to eliminate the pad with an exposed copper. Why is this happening and how should I overcome this problem. FYI, the experiment was also done with stncil aperture which purposely design longer than the pad length but still we tends to see a small portion of the pad at the edge end, exposed.

I've explaind to the our customer about the OSP finised characteristic but they asked me why..and I kind of "doinkk!!!?" To be honest, I'm bnot happy with this "exposed copper" things, taking into consideration about the capillary action over the time.

I plan to go back to HASL, what do you guys think ? Coplanarity issue should be minimal with 20 mil and above, rite ? Rather than touching-up every single point on the board, and induce other problem to the board.

Pls help.

Thx..../zam_bri

With this aperture, upon inspecting the board at post reflow, the board still have

For me and I believes most of us do agree that ...The OSP process introduction requires an attitude of "making it work" instead of assessing the failures.

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Brian W.

#6577

OSP vs HASL | 14 May, 2001

Personally, I prefer the OSP. I get a flat surface to deposit paste on, resulting in more consistent solder paste volumes. With HASL, the amount of plating and the mounding affect the paste deposition. I have even had it affect the placement. The HASL finish is inconsistent even within one pad, as well as from pad to pad.

The little bit of exposed copper at the edges of the pads is not an issue. It is actually acceptable per IPC, provided you have good wetting and meeting the joint specs.

There are several ways to approach the step stencil. One way is to run 2 stencils, one for the SMT parts, and then a second for the paste in hole areas. You can also vary the geometry (diamonds, circles, squares,etc)and aperture dimensions of the through hole components. Bob Willis has some great information on this. He has a website, but I don't remember what it is. I have done paste-in-hole on boards similar to what you describe with very good success rates using those techniques.

Hope this helps, Brian W.

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#6582

OSP vs HASL | 14 May, 2001

Continuing along the path that Brian took ...

IPC-7525 gives design guideline for stepped stencils. It goes something like: * Stepped area SB GT 25 thou from pads located on the greatest thickness of the stencil * Pads in stepped area SB GT 35 thou from the step for each thou that the stencil is stepped

See IPC-A-610B, Section 4.2.1, "Exposed Basis Metal". There is a note that addresses OSP and exposed copper. Even without applying the note, it is still considered only a process indicator rather than a nonconforming defect. If you are working with IPC-A-610C, it is covered in better detail in Section 6.5.2, "Exposed Basis Metal". This says: "Surface mount ICs, organic solderability preservative [OSP] coated PWBs, leaded components, sides of land patterns, conductors, and use of liquid photoimageable solder resist, can have exposed base material per original designs."

It�s easy to get rid of the copper shadows that you mention. Just spritz the boards with some flux, before reflow.

When you say: "To be honest, I'm not happy with this �exposed copper� things, taking into consideration about the capillary action over the time." I understand "unhappy", but what do mean by "capillary action over the time"?

Your product will not last that long, for reasons other that exposed copper surfaces. Consider: * Statue of Liberty first built in France in 1884, erected in 1886, stood for 100-years being exposed to all the elements, until it's restoration (begun in 1984). And even then, it was rotting-out in the areas where there was two dissimilar metals. * All that copper wire that is still hanging on telephone poles, after 100+ years.

This green color is a copper oxide. Copper oxides act very similar to anodizing of aluminum, sealing the copper surface from further oxidation.

Now, let me fan your anxieties, copper corrosion products, primarily sulfides and chlorides (not oxides), have been known to migrate into component packages, as well as migrate between leads, causing increased current leakage or an electrical short. In order for migratory corrosion products to appear, you need chlorides and sulfides in the environment. This can be from leftover fluxes and other chemicals on the board or it can be from industrial gases (you'd be surprised how much chlorine gas you breathe in everyday). The corrosion products can only migrate into the package if there is a delamination between the encapsulant and the lead.

OK, let�s reel it back in, look at [ http://www.pcfab.com/archive/2000/0007/risk.html ]. This talks about various surface finishes: HASL, benzimidazol, imidazol, immersion gold on electroless nickel, immersion silver on copper, electroplated palladium on copper, and immersion gold on electroplated palladium. There is nothing in this study that suggests a problem with exposed copper [which we know OSP that solder doesn't flow out to pad edges as with HASL]. The only problem that this study points out is that there may be a problem with handling and multiple heat cycles. I believe this is because this study may have been conducted before there has been improved formulations of OSP. There are now formulas that are more robust to handling and multiple heat excursions.

"Printed Circuits Handbook"; Clyde F. Coombs; Chapter 37 "Reliability of Printed Circuit Assemblies", Paragraph 37.5.1.3 "Metal Finishes" says:

"The metal finish on the SMT and TH pads can have an impact on PTH reliabilty and on the reliability of the solder joints made to these pads. Common metal finishes for solder-mask-over-bare-copper (SMOBC) boards include hot-air solder leveling (HASL or HAL), organic-coated copper (OCC), and electroless NiAu. Galvanically plated CuNiAu and CuNiSn made by another processing route are also available. These finishes provide a solderable finish for later printed circuit assembly. The pros and cons of the various finishes are discussed in turn.

Of the most common metal finishes, HASL is the only one which can directly reduce reliabilty of the board. In a typical HASL process, the board receives a severe thermal shock when it is dunked into a bath of molten eutectic Sn-Pb solder. The PTH can survive only a certain number of solder shocks without failure; this process step uses up one of these thermal cycles before the board leaves the fabricator.

Organic-coated copper provides a consistent, flat, solderable metal finish. Exposed copper after printed circuit assembly has been a persistent reliability concern, because it is generally not permitted on HASL boards. While exposed Cu on HASL boards is associated with poor solderability, which may be due to contaminates that were not removed before the HASL process, there is little evidence that exposed copper on a properly processed OCC board causes reliability problems. Surface insulation resistance (SIR) testing shows that OCC boards have comparable or better performance than HASL boards in high-temperature, high-humidity storage tests."

� or words to that effect.

If this doesn't aswage your other concerns: For US military [I think Euroland space, also] applications, exposed copper is not permitted. Copper has to be solder coated and/or conformally coated to protect it from harsh environments, especially in aircraft, because if the copper oxidizes sufficiently, it can flake off, and being conductive, the coating over-comes the risk of short-circuiting and blowing a fuse expensive equipment.

Finally on your point "rather than touching-up every single point on the board and inducing other problems to the board", you're probably correct that the coplanarity issue being minimal with 20 mil and above

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