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QFN Thermal pad voiding

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QFN Thermal pad voiding | 15 May, 2009

Hi all,

Is there any standard for percentage voiding on the center thermal pad on a QFN?

We use the dot matrix array for paste to allow for outgassing etc, but we have had a couple of xray inspection "fails" for voiding on this pad , in or around 30-40% voiding. Is this not normal considering its a relatively large square pad????


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QFN Thermal pad voiding | 19 May, 2009

we had many problems with this. there is no standard that I could ever find. we came up with our own after weeks of headaches. we use 25% as our guide line we use window pain only for the center paid to allow for out gassing and reduce 15-20% globaly. with sqz out we get pretty good results.

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QFN Thermal pad voiding | 30 May, 2009

Hi Aj,

No. There is no standard for this, that I'm aware about. Basically because the middle pad has 2 main purposes:

1. Heatsink 2. To be grounded

Keep in mind, to that to much solder in the center pad will cause 1, 2 or 3 sides to be lifted, to less solder in the middle cooling pad - not enough heat transfer will occur, which in turn make the QFN failing. If The designer don't use 100 % of the capacity of the QNF, normally you will be safe to say 70 % of the ground pad that should be soldered and still be cooled enough. A tip is to to ask the designer whether or not if they are going to use the full extents or capacity of the QFN. HAHA, They will of course reply with: Yes we do! Don't believe them!

For ex. QFN 9x9mm or QFN 5x5mm with 9 vias or (whatever nr) in the ground pad, pcb thickness 1.6mm => make 4 square rounded corner apertures on the ground pad and the total reduction of 20 % (80 % solder paste). Then you still be able to solder the terminals around.

Don't worry to much of the void's. Just following my tips and you will be fine. The X-ray will always complains about voids in this particular matter. There will always be voids. I can safely say, after our customers temp cycling for solder strength and aging (and our telecom customer req. 10-20 years life time), that up to 20 % small voids will not affect you in any way. That is if you still do the temp profiling & follow the basic guide lines.

We SMT-mount & reflow soldering various QFN packages onto our customers pcb:s without any problem. We also make our own stencil apertures always with the very same stencil thickness = 127 microns = 0.13mm (approx) Best Regards Ps.Sorry for my poor english & grammar. Ds.

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QFN Thermal pad voiding | 1 June, 2009


Have you ever worked with a 3-row I/O QFN? QFN180 to be exact?


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QFN Thermal pad voiding | 3 June, 2009

Never! Sorry, Steve But I would expect the same approach, which mean; either 4-small squares with rounded corners or if the pitch are even smaller, do rounded apertures, but still make several of them.

The reason? Yes, You guessed right: Less solder and smaller smaller solder joints => less total area of voids, which mean a much more strength in the joint and much easier to solder such a cooling pad grounded via vias, with this approach!

The same goes for big cooling pads of let say Power transistors without any via etc. Always remember: There are/is not only the thickness of the solder joint, but the contact that the terminal-pad are making to the each other who makes a connection to a electrical & mechanical strength.

Remember to make sure that the total amount of paste is less than the area on the solder pad => less total solder joint than the pad. Something around 70-80 % solder in the joint.

That will give you the best solder and easiest way also to perform. Now there are some people who investigate this and they probably will come up with some figures about this and that's ok.

I will also show you some x-ray pictures taken through the layers, but there is one picture the SMTnet didn't let me to upload, and that is the 40mil.tif Never the less because of the size of the pictures you got an Idea how difficult it is to fulfilled the req. of getting the heat transfer to the ground pad via vias? On other words, get the vias filled to at least 50%.n That is enough!

These pictures shows only the vias filled with soldeer and how much, through different layers. I am sorry to say that I could not up-load the 40mil picture.

First, this QFN 36 + 1 and 0.5mm pad pitch, well...

Best Regards, Ps. I'm sorry for my poor English & grammar. Ds.

Ahh, an correction made 2010-02-04 I re-send my pictures, so here it is. Still > 65 % solder fill in the vias and > 50% is req. The pcb is 1.6 mm thick. In opposite order, Mika


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