Printed Circuit Board Assembly & PCB Design SMT Electronics Assembly Manufacturing Forum

Printed Circuit Board Assembly & PCB Design Forum

SMT electronics assembly manufacturing forum.


Wavesoldering

Sal

#5536

Wavesoldering | 13 March, 2001

Guys

Just a quick wavesoldering question . What I would like to know is : What causes opens on test points on a single sided board which is fully exposed when it goes over the wave ? The problem is so intermittent that it's doing my head in. The fluxer operation is fine. When I say open what I mean their is no solder fill in the test point, which in turn cause me a problem on test. Any advice would be gratefully appreciated.

Adam

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#5555

Wavesoldering | 13 March, 2001

So, what is not soldering? Pads er test points?

I assume the holes are unsupported, right?

Tell us more about the test points. Are they the kind with the little pastic shoulders [on the primary side] that keep them from falling through the hole? If so, how does your supplier attach the plastic shoulder to the metal test point? Er if not, discourse on the test point please.

Tell us more about the size of the finished hole and the shape and size of the test point.

So, the finish on your pads was ... ? And what was it that you wanted to tell us about your WS flux and solder? And while you're at it, what was it you wanted us to know about the finish on the test points?

Finally, what do you do when you realize that you have a poorly soldered test point? ... How do you fix the problem? Can you make a poorly soldered test point take solder? If so, how?

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Sal

#5581

Wavesoldering | 15 March, 2001

Sorry for the lack of information provided, I'll try again :

Test Points are the one's that are not soldering. The test points are round in geometry, 0.5MM(metric) in diameter with a HASL finish.The test point are no different to the ed through hole pads but smaller.The chemistry used is No-Clean, using KOKI flux and tin/lead solder over the wavesoldering machine. The assebmly is fully exposed to the wave sat within a WSC.In terms of Solderability, the test points which are coming out unsoldered are being touched up on rework with no problems reported.

Sal.

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JAX

#5583

Wavesoldering | 15 March, 2001

I am not sure if it is feasible in your situation becuase I don't know enough about your board ( mixed technology, single-sided, etc.... ) , but have you ever considered screen printing paste onto the test points??

JAX

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Michael Parker

#5595

Wavesoldering | 15 March, 2001

Are the tin/lead ratios compatible betweem HASL and wave solder? Probably are, just a remote possibility. Flux application is? bubbler, sprayer? Either way, are you getting good misting, coverage on those teeny 0.5mm test points? If not, then not much additional solder from wave will be captured. What about Z height of HASL finish with regards to Solder mask? Could it be that the test points are low and your ICT probes aren't making good contact. Once you hand solder that same location, maybe you are finally coming up to a grade height that works. What about the no-clean flux creating a non-conductive barrier that the tests probes can't penetrate. Is your no-clean flux in hand soldering of the same kind in wave? SMT? different fluxes will have dissimiliar properties for conductivity. Test probe points. Are they dirty, causing intermittant failures. No-clean is notorious for building residuals on probe tips. A few more thoughts for you to ponder and resolve.

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rentreo

#5596

Wavesoldering | 15 March, 2001

Sounds like a problem I ran into recently. In my case it was a problem with via holes which were used as test points on our in-circuit tester. My problem was caused by moisture in the boards. My cure was a 24 hour bake at 100 deg c.

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#5602

Wavesoldering | 15 March, 2001

That you can solder the test points with a little extra flux and a good blast of heat makes me think there is nothing fundamentally wrong.

I'd guess there is oxidation on some test points that is a little crustier than others. You might be able to workout a slightly improved wave temperature profile by sacrificing some virgin test points.

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