Providing Thermal Relief On Vias

Hello: BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: 1 Mixed technology and will be wave soldered after reflow 2 Fine pitch QFPs on the top side 3 Through vias connected to leads on fine pitch QFPs Dave F

reply »

| Hello: | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | 1 Mixed technology and will be wave soldered after reflow | 2 Fine pitch QFPs on the top side | 3 Through vias connected to leads on fine pitch QFPs | Dave F Christ Dave, You've arisen and are resurrected. Oxymoron is an apt term for most designers never having touched processes, parts or product (what the hell - I must go for it but cannot live without them - when they listen). Beyond this, compromise, through experimentation, is the answer concerning thermal relief and solderability. From a new disciple awaiting thinking well beyond his scope but, thankfully, now relegated to earthly matters. Earl Moon

reply »

| Hello: | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | 1 Mixed technology and will be wave soldered after reflow | 2 Fine pitch QFPs on the top side | 3 Through vias connected to leads on fine pitch QFPs | Dave F Dave, How about putting a heat sink in the board? Got a layer that the via doesn't connect to? Put a chunk of copper around it to sink heat out. That'll freeze that solder dead in it's tracks. Or, just steal a small bit of real estate from the power or ground plane. A DFM-sensitive circuit board designer would gladly give up a small bit - don't need much more than a quarter inch circle - before he sobers up. Cheers! Chrys

reply »

| Hello: | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | 1 Mixed technology and will be wave soldered after reflow | 2 Fine pitch QFPs on the top side | 3 Through vias connected to leads on fine pitch QFPs | Dave F

Hi Dave, Hopefully I won't sound to arrogant here but these "process" guys have a difficult time answering PCB design questions so may I make some suggestions. A. What we do is remove all the thermals on whatever plane your via is connected to ( you have the option of no thermal for the complete board or be selective for the components you think may be a problem ) & use no thermal thus sinking the heat before is reaches the smt component pad on the reflow side of the board. Thermals were used primarily on thru hole multilayer boards such that component removal was a simpler process, smt boards on the otherhand always have a strip of copper before connecting to the via which tends to lessen heat sinking thru the via. B. Should you feel that option A is not the solution for you then may I suggest that on the wave side of your board that you button print (tent) all your via holes (this is a 5 mil oversized "via only" gerber file that your board mfgr can use for the first pass solder mask ) and then remove all your via apertures on your solder mask gerber file such that you end up with a double print on all your vias preventing the wave solder from wicking to the the reflow side of the board. The only problem with this process is you must be careful that no vias are under smt components ( if you have any ) on the wave side of the board the assembly guys may complain that the smt components don't lie flat and please ask your assy house if they would have a problem with contamination of the via hole some houses will. Please do not use the above process on the reflow side of the board 'leave the vias open' this may cause blow-out of the solder mask if the boards have taken on humidity. I would also suggest you ask your board mfgr and your assy house if they can suggest any other methods, board design today is a marriage between all the processes involved the more you know about the other guys the better your PCB design will turn out. Hope I helped good luck. John Allan. Cadcopac (514) 333-3131

reply »

| | Hello: | | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | | 1 Mixed technology and will be wave soldered after reflow | | 2 Fine pitch QFPs on the top side | | 3 Through vias connected to leads on fine pitch QFPs | | Dave F | Dave, | How about putting a heat sink in the board? Got a layer that the via doesn't connect to? Put a chunk of copper around it to sink heat out. That'll freeze that solder dead in it's tracks. | Or, just steal a small bit of real estate from the power or ground plane. A DFM-sensitive circuit board designer would gladly give up a small bit - don't need much more than a quarter inch circle - before he sobers up. | Cheers! | Chrys Chrys: We have the nice folks in design layout put a "wagon wheel" thermal relief around through holes that are in large ground plans. I that what you're talking about? Dave F

reply »

| | Hello: | | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | | 1 Mixed technology and will be wave soldered after reflow | | 2 Fine pitch QFPs on the top side | | 3 Through vias connected to leads on fine pitch QFPs | | Dave F | | Hi Dave, | Hopefully I won't sound to arrogant here but these "process" guys have a difficult time answering PCB design questions so may I make some suggestions. | A. What we do is remove all the thermals on whatever plane your via is connected to ( you have the option of no thermal for the complete board or be selective for the components you think may be a problem ) & use no thermal thus sinking the heat before is reaches the smt component pad on the reflow side of the board. Thermals were used primarily on thru hole multilayer boards such that component removal was a simpler process, smt boards on the otherhand always have a strip of copper before connecting to the via which tends to lessen heat sinking thru the via. | B. Should you feel that option A is not the solution for you then may I suggest that on the wave side of your board that you button print (tent) all your via holes (this is a 5 mil oversized "via only" gerber file that your board mfgr can use for the first pass solder mask ) and then remove all your via apertures on your solder mask gerber file such that you end up with a double print on all your vias preventing the wave solder from wicking to the the reflow side of the board. The only problem with this process is you must be careful that no vias are under smt components ( if you have any ) on the wave side of the board the assembly guys may complain that the smt components don't lie flat and please ask your assy house if they would have a problem with contamination of the via hole some houses will. | Please do not use the above process on the reflow side of the board 'leave the vias open' this may cause blow-out of the solder mask if the boards have taken on humidity. | I would also suggest you ask your board mfgr and your assy house if they can suggest any other methods, board design today is a marriage between all the processes involved the more you know about the other guys the better your PCB design will turn out. Hope I helped good luck. | John Allan. | Cadcopac | (514) 333-3131 John: Let's talk about "A." We like to add pads to vias and use them as test points. What do you mean by "remove all the thermals on whatever plane your via is connected to"? And is that what Chrys is telling me? Dave F

reply »

| | | Hello: | | | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | | | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | | | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | | | 1 Mixed technology and will be wave soldered after reflow | | | 2 Fine pitch QFPs on the top side | | | 3 Through vias connected to leads on fine pitch QFPs | | | Dave F | | Dave, | | How about putting a heat sink in the board? Got a layer that the via doesn't connect to? Put a chunk of copper around it to sink heat out. That'll freeze that solder dead in it's tracks. | | Or, just steal a small bit of real estate from the power or ground plane. A DFM-sensitive circuit board designer would gladly give up a small bit - don't need much more than a quarter inch circle - before he sobers up. | | Cheers! | | Chrys | Chrys: We have the nice folks in design layout put a "wagon wheel" thermal relief around through holes that are in large ground plans. I that what you're talking about? Dave F Dave, I'm talking about the exact opposite. The "wagon wheel" provides thermal relief where your pin's through hole connects to the ground plane. It provides the required electrical connection to ground, but does so in a way that limits the thermal connection. If there was no "wagon wheel" the solder would freeze right there at that layer where it hits the solid copper connection. So, if you don't have a wagon wheel, but a solid chunk of copper, Viola - instant heat sink! Just like the olden days when we didn't have nice folks in design layout who put wagon wheels on ground planes. Chrys

reply »

| | | Hello: | | | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, opens etc. | | | One solution is to set the wave the recipe so that the SMT leads do not relow, which is good. The problem is the vias near/connected top-side compompont leads can conduct heat to the lead and ... | | | QUESTION: How would a good design for manufacturabilty sensitive circuit board designer (if than't not an oxymoron) design a through via with thermal relief on a board that has: | | | 1 Mixed technology and will be wave soldered after reflow | | | 2 Fine pitch QFPs on the top side | | | 3 Through vias connected to leads on fine pitch QFPs | | | Dave F | | | | Hi Dave, | | Hopefully I won't sound to arrogant here but these "process" guys have a difficult time answering PCB design questions so may I make some suggestions. | | A. What we do is remove all the thermals on whatever plane your via is connected to ( you have the option of no thermal for the complete board or be selective for the components you think may be a problem ) & use no thermal thus sinking the heat before is reaches the smt component pad on the reflow side of the board. Thermals were used primarily on thru hole multilayer boards such that component removal was a simpler process, smt boards on the otherhand always have a strip of copper before connecting to the via which tends to lessen heat sinking thru the via. | | B. Should you feel that option A is not the solution for you then may I suggest that on the wave side of your board that you button print (tent) all your via holes (this is a 5 mil oversized "via only" gerber file that your board mfgr can use for the first pass solder mask ) and then remove all your via apertures on your solder mask gerber file such that you end up with a double print on all your vias preventing the wave solder from wicking to the the reflow side of the board. The only problem with this process is you must be careful that no vias are under smt components ( if you have any ) on the wave side of the board the assembly guys may complain that the smt components don't lie flat and please ask your assy house if they would have a problem with contamination of the via hole some houses will. | | Please do not use the above process on the reflow side of the board 'leave the vias open' this may cause blow-out of the solder mask if the boards have taken on humidity. | | I would also suggest you ask your board mfgr and your assy house if they can suggest any other methods, board design today is a marriage between all the processes involved the more you know about the other guys the better your PCB design will turn out. Hope I helped good luck. | | John Allan. | | Cadcopac | | (514) 333-3131 | John: Let's talk about "A." We like to add pads to vias and use them as test points. What do you mean by "remove all the thermals on whatever plane your via is connected to"? And is that what Chrys is telling me? Dave F Dave, I would need to know more info to correctly respond to your questions. A. Do you require that all your vias be filled with solder? ( this changes the whole process you would be forced to go with the B option using the solder mask ) B. The test points that you require are they on the top side of the board only ( sm pads ). C. How many layers are you working with? My previous suggestions, I should have mentioned originally, are for VCC & GND vias only, you remove the thermal flash leaving only the drill hole in the vcc/gnd plane sinking the heat before it reaches the component. Now the other vias that do not join to vcc/gnd planes are the only remaining problem this can be resolved by placing the test pad (where you require them) that you refer to between the component & the via and add extra copper on other layers for those without test pads but this is starting to become a complicated explaination I would appreciate if you called me we can look at all the options without imposing on this forum I will be glad to post our final conclusions for those who are following the thread. regards, John

reply »