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How much capacitor offset is acceptable?

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#46218

How much capacitor offset is acceptable? | 17 December, 2006

I'd like to know how much capacitor offset from the pad should be acceptable? What are the risks of the placement offset if greater than the acceptable level?

I'm still quite new to this so any help will be very much appreciated. Thanks

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#46219

How much capacitor offset is acceptable? | 17 December, 2006

If you are talking about a chip capacitor, then I think it's 50% (of component width) side to side for class 1 and 2. And 25% for class 3. There is no end overhang permitted for all 3 classes.

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#46220

How much capacitor offset is acceptable? | 17 December, 2006

what about for cases of 0306 and 0204 chip capacitors?

what is end overhang?

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#46221

How much capacitor offset is acceptable? | 17 December, 2006

oh and i forgot, what's the risk/failures to the pcb board/unit if these specs are not followed?

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RDR

#46228

How much capacitor offset is acceptable? | 18 December, 2006

You need to get yourself a copy of IPC 610. this has all the specs regrding placement and registration.

chip aprts are allowed to have 50% side overhang. the fillet requirements are "evidence of wetted fillet" .

I would not know if a cap being 51% off pad would be a reliability risk.

Russ

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#46247

How much capacitor offset is acceptable? | 18 December, 2006

Boomerang, You said you are new to this so,

First question. Are the components placed correctly with no offset pre-reflow? If the answer is yes then it's happening in the oven. Most likely cause is pcb design. If the answer is no then you have a placement issue. Most likely causes are; incorrect placement data OR machine is not calibrated.

Second question. What placement machinery are you using.

Third question. (This should probably be first question). What is your process; reflow or wave?

Fourth Question. What sort of solder are you using and what sort of pcb finish.

You'all come back now.

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#46249

How much capacitor offset is acceptable? | 18 December, 2006

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