Printed Circuit Board Assembly & PCB Design Forum

SMT electronics assembly manufacturing forum.

SMTnet
»
Electronics Forum
»
QFNs (LCCs)

QFNs (LCCs)

Subscribe to Thread

Hey fellas. Listen, I'm trying to see what the industry as a... - Dec 21, 2006 by BillyD

we are reducing the thermal pad stencil apertures by 40% on ... - Dec 21, 2006 by RDR

Ditto what Russ said. We are doing the same with the same r... - Dec 21, 2006 by

Wait a second... 10 to 15 mils at toe end. How are you doing... - Dec 22, 2006 by BillyD

Hi, We had issues withthese parts when we first ran them ... - Dec 22, 2006 by

Thanks kids! Have a fantastic Christmas, and an awesome new... - Dec 22, 2006 by BillyD

we just started placing these types of parts our first bac... - Dec 22, 2006 by WRONGWAY

We generaly reduce 25% and get great heat sink capability. ... - Dec 22, 2006 by Real Chunks

Hi, This Not so easy as one wuold think. Has the thermal p... - Dec 22, 2006 by Mika

Thanks dude. It's a bit tough, but I guess so long as it's w... - Dec 27, 2006 by BillyD

BillyD

#46341

QFNs (LCCs) | 21 December, 2006

Hey fellas. Listen, I'm trying to see what the industry as a whole is doing with regard to placement and reflow of the tiny QFN devices. Not the larger ones, but the 4mm or 5mm ones. We struggled a bit with a QFN24, 5mm square. The thermal pad underneath is quite an issue, as too much solder acts as a standoff, but too little and you don't have enough of a conductive process to move the heat away quickly enough, and the part dies. So, I'm trying to pick your collective brains; what are you folks doing to work with these? It seems most people believe these are where BGA technology was five or six years ago. Any thoughts?

reply »

RDR

#46342

QFNs (LCCs) | 21 December, 2006

we are reducing the thermal pad stencil apertures by 40% on these with great results

Russ

reply »

MFG CAVEMAN

#46344

QFNs (LCCs) | 21 December, 2006

Ditto what Russ said. We are doing the same with the same results.

We also will add 10-15mils to the toe end of the pads to have some chance at forming a toe fillet. MFG'r recommended padstacks are not to be trusted. We only process with no-clean chemistry as well.

reply »

BillyD

#46351

QFNs (LCCs) | 22 December, 2006

Wait a second... 10 to 15 mils at toe end. How are you doing that? See, the ones we did have a bit of a time with had no catellations on the outside. So, it's like a BGA in that regard. All your paste goes under the part, so if it's not even, or if it's excessive, you're screwed.

reply »

#46353

QFNs (LCCs) | 22 December, 2006

Hi,

We had issues withthese parts when we first ran them thru our process.

As the other lads have said - reduce thermal pad by 35-40%. ( we achieve this by using a dot matrix) . We also offset the lead apertures by 3thou ( i.e sort of overprinting) This works without fail everytime.

You should not be seeing any issues with a QFN placement wise as they are designed to center during reflow.

If you get the datasheet on the part the manf. will have recommended aperture design etc.

aj...

reply »

BillyD

#46354

QFNs (LCCs) | 22 December, 2006

Thanks kids! Have a fantastic Christmas, and an awesome new year. Take care all.

reply »

WRONGWAY

#46357

QFNs (LCCs) | 22 December, 2006

we just started placing these types of parts our first bacth of boards ran just fine no bridges no plscment problems the second run we had bridges on all most every one 100 piece build we found the first batch had solder mask between the pads the second build didn't have any solder mask between the pads so make sure there is solder mask between the pads.

reply »

Real Chunks

#46362

QFNs (LCCs) | 22 December, 2006

We generaly reduce 25% and get great heat sink capability. Mind you that we do not perferate the pad with vias as recommended.

Our toe ends are not plated, so getting any toe fillet is impossible.

reply »

Mika

#46367

QFNs (LCCs) | 22 December, 2006

Hi, This Not so easy as one wuold think. Has the thermal pad of yours vias? How many? What's the via's dia? What is the pcb thickness? If the the pcb has a "ground layer" connected (vias) to the pcb thermal pad, it could sometimes be a little bit tricky to solder. There are cases that a non via is needed, but still the heat transfer has to work. There are some calculation to be done of how the optimum stencil aperture shold be done. Sometimes; a lot of circles, 4 smaller qsuares, one resized rectangle etc. This vary a lot between different packages and most important; how much effect they will be used at. Remember that solder paste will shrink during reflow while it becomes solder - greatly and will fill up the via's somewhat.

All of this whitout to have the surrounding component "pads" to be lifted during reflow. That is the trick! Some manufactories state that at least 80% of the thermal pad must be solder with no more than 10% of voids to be able to get a proper heat transfer to the ground plane. We have produce the "so called" MLF, QFN, LLP and even TSSOP, QFP, SOP's with a thermal pad for some time now and it is not so easy. Some of the component manufactories have recommendations, but remember - there are often another company who actually does the encapsulation and they should provide you with their best recommendation along with the pcba designers input of how much heat sink is needed. Less is better for You.

We have in the past done several cross sections cut's on theese packages and temp cycling together with our customer, to see what the life time is, because of the "long life time working needs" of their pcba:s (Telecom) and we find out some interesting things, but this forum/thread is to short to expand this info and I am not sure if can, even of I am willing to share... The X-ray inspection is sometime not so easy to do, but is recommended.

BTW. Don't worry about the "copper like" toe-end of the surrounding therminals on the QFN-24 (or any QFN for that matter). You will almost Not likely be able to solder theese bastards 100%. And that is OK! We don't talk toe-fill on QFN packages!! Theese packagages can not and should Not be treaten as a regular leaded package as far as soldering. The inspection people of Yours should also be trained of how to do a proper solder acceptance of theese comps.

/Sincerly Ps. Sorry for my poor english & grammar. Ds.

reply »

BillyD

#46388

QFNs (LCCs) | 27 December, 2006

Thanks dude. It's a bit tough, but I guess so long as it's well thought out, it's like anything else. I shoot for a 60% coverage, pre reflow, with the vias either filled with epoxy, or capped with mask, at least if the plan is to use the thermal pad for heat dissapation. Filling of even one or two can reduce those necessary properties enough to limit the life span of those parts greatly. Castellations on the outside help tremendously as well! Thanks for all the inout guys. I do appreciate it.

reply »