I am using different equipements for SPI such as Koh Young and Cyber Optics machines. I am looking for implementing a general procedure (SWP) for setting LSL's and USL's on the products on which the customer does not specify any limits on the solder deposition.
On most machines (Koh Young) i currently use an "SPC Plus" version software for 3D inspection as follows:
1. run a test lot of 10 PCBs on screen printing with printing parameters (squeegee speed/pressure, snap-off speed/distance etc) in concordance with PCB dimensions.
2. start from a group of limits in SPI selected according to the stencil thickness (ie: for 100um stencil thickness i use lower limit of 70um and an upper limit of 170um). I use these limits on the whole stencil, for all the apertures. I only ise different USL and LSL for aperture groups in case of STEP UP/DOWN stencils.
3. on SPI program (particularly Koh Young's SPC Plus), i look for the height histogram. here i can see my lowest and highest limits for the test run. Considering the test run stable enough, i could go +/- 10um from LSL and USL and choose those values as my valid mass production limits for paste deposit height.
All these work well in the field, but i don't currently have a SWP on chosing these limits and i can't find anything else on the internet about this.
My problem is: is there a standard to choose these limits? +/- 10um over and under test run limits is OK, but why not 15um, if all PCBAs are PASS VIAR (visual inspection after reflow)? Is there any formula on calculating the limits?
(http://www.smtnet.com/Forums/Index.cfm?CFApp=1&Message_ID=66196)